Table 1 Comparative analysis of the suggested and traditional single-phase designs having “p” cells.
From: A quad DC source switched three-phase multilevel DC-link inverter topology
Multilevel inverter structure | CHB topology | Topology R39 | Proposed |
|---|---|---|---|
Voltage levels | (2 × p) + 1 | (8 × p) + 1 | (8 × p) + 1 |
Maximum output voltage | (p) × Vdc | (4 × p) × Vdc | (4 × p) × Vdc |
Main switches | (4 × p) | (12 × p) | (8 × p) + 4 |
Gate drivers | (4 × p) | (9 × p) | (5 × p) + 4 |
Maximum device count in the conduction path | (2 × p) | (3 × p) | (p) + 2 |
SDCs | (p) | (4 × p) | (4 × p) |
Overall standing voltage on switches | (4 × p) × Vdc | (18 × p) × Vdc | (6 × p) × Vdc |
Voltage level generation section | |||
Polarity reversal section | (16 × p) × Vdc |
