Fig. 1
From: Out-of-plane interface dipoles and anti-hysteresis in graphene-strontium titanate hybrid transistor
Structure and electrical characterization of graphene–STO hybrid. a Schematic of a dual-gated single-layer graphene (SLG) transistor on STO substrate with STO and hBN as back and top gate dielectrics, respectively, together with the circuit diagram for electrical transport measurement. Optical microscope images of SLG-hBN stack b on the transfer tape before transferring on STO and c after fabricating dual-gated transistor on STO. Scale bars in both (b, c) are 25 μm. d Raman spectroscopy of graphene layer used to make the dual-gated transistor showing single-layer characteristics. e Transfer characteristics with respect to top gate voltage (VTG) at 85 K. The solid and dashed lines depict the resistance of SLG channel with forward and reverse sweeps of top gate voltage respectively. f Transfer characteristics of device D1 with respect to VTG at 100 K showing the shift of charge neutrality points (CNP) at different fixed VBG from 126 V to 158 V. g The locus of the charge neutrality points (\(V_{{\mathrm{TG}}}^{{\mathrm{CNP}}}\)) with varying VBG at different temperatures from 5 K to 200 K. h The dielectric constant of STO (\(\varepsilon _{\mathrm{r}}^{{\mathrm{STO}}}\)) with varying temperatures estimated from three different devices D1, D2 and D3. For device D4, \(\varepsilon _{\mathrm{r}}^{{\mathrm{STO}}}\) was measured from Hall measurement at low temperatures
