Extended Data Fig. 4: Correlations of threshold voltages between gates within a quantum dot array made in the same gate layer, measured at low temperature.

Threshold voltage for gates G3, G5 and G7 versus gate G1 (all made in the second gate layer) for wafers 1-20 (a, b, c) and then for wafers 11-14 only (d, e, f). Threshold voltage for gates G4 and G6 versus gate G2 (all made in the first gate layer) for wafers 1-20 (g, h) and then for wafers 11-14 only (i, j). Note that for each wafer, as many datapoints are shown as (yielding) devices were characterised at low temperature. If the threshold voltages were all identical, the data points in each panel would all overlap with each other. We see a larger spread when comparing across all 20 different wafers than when comparing only wafers 11-14 to each other, which can be expected since the process parameters are more diverse across all 20 wafers. Furthermore, while the spread in threshold voltages is largest for gate layer 1, there is a clear linear trend between the threshold of different gates made within gate layer 1 on the same device.