Extended Data Fig. 1: Transport properties of WSe2-based ambipolar FET and memory. | Nature Electronics

Extended Data Fig. 1: Transport properties of WSe2-based ambipolar FET and memory.

From: Reconfigurable logic-in-memory architectures based on a two-dimensional van der Waals heterostructure device

Extended Data Fig. 1

Transport properties of WSe2-based ambipolar FET and memory. Schematic structure of WSe2-based (a) ambipolar FET and (c) ambipolar memory. (b) The corresponding optical image. (d) Transfer curves of WSe2 FET, where graphene is used as the back gate and drain voltage is applied between electrodes E2 and E3. Typical ambipolar conduction behaviour is observed with the minimum current point locating at around 0 V, and the small voltage hysteresis demonstrates little interface charge states. (e) Double sweep transfer characteristic of WSe2-based memory by scanning control gate voltage between -8 and +8 V. (f) Retention performance of channel current after applying voltage pulse of +8 or -8 V on control gate, showing a small erase/program ratio less than 10.

Source data

Back to article page