Extended Data Fig. 2: Relationship between pulse width of CG and device performance. | Nature Electronics

Extended Data Fig. 2: Relationship between pulse width of CG and device performance.

From: Reconfigurable logic-in-memory architectures based on a two-dimensional van der Waals heterostructure device

Extended Data Fig. 2

Relationship between pulse width of CG and device performance. (a) Transfer curves of PFGFET in FET mode after different pulse width. (b) Relationship between the pulse width and ION/IOFF. Dynamic switching behaviour between p- and n-type with pulse width of (c) 90 μs and (d) 5 ms.

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