Fig. 2: Illustration of device implementation. | Nature Electronics

Fig. 2: Illustration of device implementation.

From: An integrated CMOS–silicon photonics transmitter with a 112 gigabaud transmission and picojoule per bit energy efficiency

Fig. 2

a, Circuit diagram and key parameters of the proposed all-silicon transmitter. b, Core dimensions of the inductive network. c, Microscopy view of the CMOS driver chip with gold-solder bumping. d, Conceptual illustration of the three-dimensional packaging process for the segmented U-shaped PAM-4 transmitter. e, Microscopy view of the co-packaged 1.27 mm U-shaped transmitter. f, Microscopy view of the co-packaged 2.47 mm U-shaped transmitter. g, Microscopy view of the co-packaged PAM-4 transmitter.

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