Fig. 2: Open-loop programming. | Nature Electronics

Fig. 2: Open-loop programming.

From: A large-scale integrated vector–matrix multiplication processor based on monolayer molybdenum disulfide memories

Fig. 2

a, Schematic of the two-state operation of the open-loop programming scheme. In the programming phase, the interface board is used to set the gate and source lines to the low-impedance state and the drain line to the high-impedance state, whereas in the reading phase, all three lines are set to the low-impedance state. b, Distribution of output states (wOUT) in the linear scale. The data are fitted with a gamma distribution. c, Distribution of output states (wOUT) in the log10 scale. The distributions are fitted with a Gaussian distribution. d, Three-dimensional map of log10 value of wOUT as a function of device position and different programming voltages. e, Empirical cumulative distribution function (ECDF) as a function of the programmed states in the log10 scale.

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