Fig. 10: QFT adder without QCL. | Communications Physics

Fig. 10: QFT adder without QCL.

From: Constrained optimization via quantum Zeno dynamics

Fig. 10

Quantum circuits for (a) the quantum Fourier transform (QFT) adder used in the hardware experiments and (b) the four-qubit rotation gate used in a. Note that R(α) denotes a phase gate. For the inequality-constraint experiment, we set a1 = a2 = a3 = a4 = 1, d = − 3 and used four qubits for precision. For the equality-constraint experiment, without quantum conditional logic (QCL), we set a1 = 2, a2 = a3 = − 1, a4 = d = 0 and used only three qubits for precision. For the inequality constraint, the inverse of the oracle is applied after measuring the qubit encoding the sign. However, for the equality constraint, since all auxiliary qubits are measured, we do not need to apply the inverse QFT operator and can simply reset all auxiliary qubits to the ground state. Note that here the inverse QFT operator (QFT†) does not include swaps as the reordering has been done by rearranging the banks of controlled rotations.

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