Fig. 2: Pareto front for the examples discussed in this paper.
From: Precision-dissipation trade-off for driven stochastic systems
a Pareto front for erasure plus bit-flip, with \(c=\sqrt{2}\), E0 = 2kBT and \(c=\sqrt{2}\). The dashed green line corresponds to Eq. (8). b the electrical circuit, as depicted in Fig. 1. b Pareto front for an electrical circuit with time-dependent voltage source Vs(t), resistor R and capacitor C, with tf = RC/3 and \(C{V}_{0}^{2}=2{k}_{B}T\). The green region corresponds to the values of ϵ and ΔiS that can be reached by only controlling the voltage source, whereas the red region corresponds to the theoretical Pareto front under full control. The dashed red line corresponds to Eq. (8).
