Fig. 1: Nano-assembly and contact improvement strategy.

a Simplified representation of the silicon chip on which suspended carbon nanotubes are grown between cantilevers. b Typical circuit (here a double quantum dot) onto which a CNT is transferred. An argon-milling is performed on the circuit prior to the loading into the SEM. c Nano-assembly step in which the CNT is transferred on the circuit, and disconnected from the cantilevers by driving a high current in the two outermost sections (see methods). d Current-induced annealing step. Most of the resistance of the circuit is localized at the CNT-metal interface focussing the heating power directly on the interface as represented with a red halo. e Radiative thermal annealing of the circuit using a halogen lamp. The gray global background indicates the steps performed inside our dedicated SEM.