Fig. 3: Electrical performance of vertical GeSn/Ge Gate-all-around (GAA) nanowire (NW) p-FETs.
From: Vertical GeSn nanowire MOSFETs for CMOS beyond silicon
a Schematic of a vertical p-FET (p-VFET) with Ge0.92Sn0.08 source and Ge channel. b ID–VGS transfer characteristics for a p-VFET with NW diameters of 25 nm and 65 nm. c ID-VDS output characteristics for a 25 nm NW diameter p-VFET, showing very good saturation. d Transconductance Gm of p-VFETs with NW diameters of 65 nm and 25 nm. e Subthreshold swing (SS) and peak Gm as a function of NW diameter. The SS improves and the Gm decreases for smaller NW diameters because of the increased top NW contact resistance. f Benchmarking of current GeSn p-VFETs with state-of-the-art published GeSn NW p-FETs in terms of the subthreshold swing SS.
