Fig. 3: Experimental implementation of N-bit carry-ripple adder by exploiting automation tool M3S. | Communications Engineering

Fig. 3: Experimental implementation of N-bit carry-ripple adder by exploiting automation tool M3S.

From: Mixed-mode in-memory computing: towards high-performance logic processing in a memristive crossbar array

Fig. 3

a Demonstration of the truth table of N-bit carry-ripple adder and the exploited crossbar structure. b Control sequence of N-bit carry-ripple adder using BiFeO3 memristive crossbar synthesized exploiting M3S. Each VI3 operation is noted as v in the diagram. c Illustration of logic operations for 4-bit carry-ripple adder with arbitrary inputs, which requires in total 8 cycles, i.e., 6 of VI3 and 2 of MI3 operations. d Experimental results of 4-bit carry-ripple adder, including memristance of each cell Mi, voltage on WL to shared bottom electrode VWL, voltage on BL to top electrode VBL, and the absolute values of current across each cell ∣Ii∣ of 4-bit carry-ripple adder with inputs a = 0011, b = 0101.

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