Fig. 7: Hybrid free layer SOT-MTJ stack design. | npj Spintronics

Fig. 7: Hybrid free layer SOT-MTJ stack design.

From: Recent progress in spin-orbit torque magnetic random-access memory

Fig. 7

Comparison of single CoFeB free layer (a) vs the hybrid free layer stack design (b) which enable back end of line compatibility at 400 °C annealing while simultaneously enable high TMR readout and data retention. c Illustration of data retention (∆) versus size indicates achieving ∆ > 100 kBT down to 50 nm CD using the hybrid free layer. d The relationship between switching voltage (top) and current (bottom) versus the inverse of pulse width is demonstrated. Figure are reprinted with the permission from ref. 20, copyright 2021 by the Japan Society of Applied Physics.

Back to article page