Fig. 9: Diagram illustrating the voltage-gated SOT writing scheme.
From: Recent progress in spin-orbit torque magnetic random-access memory
a A positive VCMA top gate induces electron accumulation at the FL/MgO interface, reducing the PMA of the FL and enabling SOT switching with reduced current. b Probability distribution of SOT switching (Psw) plotted against SOT pulsed voltage (VSOT) for various gate values (Vg) at tp = 0.4 ns. c Average intrinsic critical current (Ic0 avg) depicted as a function of Vg. Figure are reprinted with the permission from ref. 113, copyright 2021 by the American Physical Society.
