Table 2 Design requirements, main advantages, and key challenges of various computing schemes using integrated CMOS and MTJ
Computing schemes | Steady | Oscillatory | Stochastic | Chaos |
---|---|---|---|---|
Design requirements | ● In-memory logic: balancing nonvolatility and energy efficiency ● Neuromorphic computing: ◦ Large CMOS read signal for analog states; ◦ Efficient design by balancing the advantages of analog states and cost of CMOS analog to digital conversion | ● Neuromorphic computing: ◦ Large read margin for RF output without need of or with minimal CMOS amplification circuits; ◦ Effective tuning of the oscillatory output using CMOS | ● Efficient CMOS sampling (reading) of stochastic signals ● Efficient design of connections with CMOS ● Effective tuning of the stochastic state using CMOS | ● Efficient CMOS sampling (reading) of chaotic signals ● Efficient design of connections with CMOS ● Effective tuning of the chaotic state using CMOS |
Main advantages | ● Direct integration with CMOS process ● Mature ● Versatile | ● Intrinsic capability of handling RF signals (MHz-GHz) ● Phase, amplitude, and frequency encoding ● Tunable coupling | ● Low power consumption by leveraging thermal fluctuations ● Tunable coupling | ● Rich and tunable dynamics in one or few devices |
Key challenges | ● Multiple states with large readout margin ● Reducing IC/Δ (power-stability tradeoff) | ● Better RF interconnect ● System/algorithm development ● Multiple states with large readout margin ● Overcome device variation | ● System/algorithm development ● Overcome device variation | ● More experimental demonstration ● System/algorithm development ● Overcome device variation |