Fig. 5: Neuromorphic System implementation.

a Schematic design of circuit diagram⁵¹. b Transient electrical measurement of the ANN with three different conductance of the synaptic device. c cross-sectional scanning transmission electron microscope image of a 1T1M cell in the crossbar array⁵². d Structure of the considered SNN. Each MNIST image is reshaped as a 784 × 1 column vector, and the intensity of the pixels is encoded in terms of the firing frequency of the input neurons. The only trainable synapses are those connecting the input layer with the excitatory layer, and they are modeled with the STDP characteristic of the CMOS–h-BN based 1T1M cells. e Circuit schematic of the proposed neuron–synapse–neuron block combining h-BN based 1T1M cells and CMOS circuitry. The colors indicate the complete neuron (gray surrounding box), the core block (light-blue box) and the individual building blocks (light-red boxes). f Schematic representation of the MoS₂-_xO_x structure with CVD-grown graphene electrodes⁵⁴. g Feature extraction operation of opto-memristor sensor. h Schematic illustration of the single-layer perceptron photo memristors array for classifier emulation. Opto-memristors of the same class (color) are interconnected in parallel to generate the output current for the activation function.