Figure 8
From: Silicene nanomesh
Schematic of FET channel made of traditional 3D material (Si) and 2D material (SNM) and their corresponding vertical potential diagrams.
2D materials have clean surface with fewer traps in semiconductor-dielectric interface and are extremely thin compared to traditional 3D materials, leading to a better gate control. V(x) and |Ψ(x)|2 represent the potential and the probability density of the electronic charges, respectively.
