Figure 4 | Scientific Reports

Figure 4

From: Significance of the double-layer capacitor effect in polar rubbery dielectrics and exceptionally stable low-voltage high transconductance organic transistors

Figure 4

Bias stress analysis of e-PVDF-HFP devices with PTDPPTFT4 as the semiconductor material.

(a) Bias stress behavior (IDS vs. time) for the PTDPPTFT4 FETs under VG = −0.5, −1, −3 and −5 V in ambient conditions. (b) Long-term bias on current ID and leakage current IG measured at the end of each bias cycle in air (solid symbols) and in DI-water (open symbols). A bias of VD = VG = −0.5 V was applied and transfer characteristics were measured before and immediately after each bias step. (c,d) Evolution of mobility and shift of threshold voltage in both the linear and saturation regimes during long-term bias in air and DI-water, respectively. The field effect mobility was calculated with the quasi-static capacitance. The decrease of mobility was analyzed by performing a linear regression in time exhibiting a slope of about −0.22%/hour and −0.25%/hour, for the device in air and DI-water, respectively. Interruptions in the plots are the start of a new measurement cycle and refilling the syringe pump in case of the device exposed to DI-water.

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