Table 1 The electrical and memory performance of OFET memory device with ZnO NPs blended with PS and PVPK as charge-storage layer.

From: High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

 

μave [cm2V−1s−1]

ION/IOFF

Vth, ave [V]

Vth, ave [V]

Memory window [V]

Writing process

Erasing process

PS

0.32 ± 0.02

106

−5.90 ± 0.8

−7.50 ± 0.5

−9.20 ± 0.3

4.23

ZnOPS10

0.36 ± 0.01

106

−8.87 ± 0.5

12.27 ± 1.2

−10.87 ± 1.3

23.14

ZnOPS20

0.58 ± 0.03

106

−9.29 ± 0.2

17.54 ± 2.1

−10.21 ± 1.2

27.75

ZnOPS30

0.62 ± 0.05

105

−8.53 ± 0.7

21.99 ± 1.2

−9.27 ± 1.1

31.26

PVPK

0.12 ± 0.02

106

−4.50 ± 0.8

−7.50 ± 0.3

−47.50 ± 1.2

36.55

ZnOPVPK10

0.36 ± 0.01

106

−9.42 ± 0.5

11.76 ± 1.2

−44.48 ± 1.7

56.24

ZnOPVPK20

0.40 ± 0.03

106

−9.78 ± 0.2

18.54 ± 2.4

−40.42 ± 2.3

58.96

ZnOPVPK30

0.48 ± 0.05

106

−10.2 ± 0.7

22.98 ± 1.4

−37.27 ± 0.8

60.25