Figure 2
Schematic for fabrication of silicon nanopore membranes.
(A) Piranha clean of double side polished Si wafer. (B) Thermal oxidation growth of SiO2 and low pressure chemical vapor deposition (LPCVD) of polysilicon. (C) Dry-etch patterning of polysilicon. (D) Thermal oxidation growth of SiO2 for use as sacrificial layer defining nanopores. (E) Patterning of anchor layer by wet etch. (F) LPCVD of polysilicon. (G) Blanket-etch of polysilicon until exposure of vertical SiO2 nanopores. (H) Deposition of low temperature oxide (LTO) for membrane protection and backside etch of membrane with deep reactive ion etching. (I) Dry etch removal of LTO and wet etch release of SiO2.
