Figure 2
From: Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax
DC characterization.
(a) A fabricated 200 mm Si wafer. (b) Deep-submicron buried gate trenches etched with α-Si mask. Scale bar: 2 μm. (c) Cross-section view of a 100-nm-gate-length GFET structure. Scale bar: 2 μm. The inset shows the close-up view of the 100 nm buried gate. Scale bar: 1 μm. (d) TLM measurement of graphene-Pt contact resistance, which results in RC = 550 Ω μm. The inset shows the SEM image of the TLM device. Scale bar: 10 μm. Transfer (e) and output (f) characteristics of the 100-nm-gate-length GFET. Transfer (g) and output (h) characteristics of a 300-nm-gate-length GFET. Cross-section views of the structures of a 200-nm-gate-length GFET (i) and a 300-nm-gate-length GFET (j).
