Figure 3 | Scientific Reports

Figure 3

From: Impact and Origin of Interface States in MOS Capacitor with Monolayer MoS2 and HfO2 High-k Dielectric

Figure 3

(a) The measured capacitance at accumulation regime decreases monotonically with increasing frequency. This is an indication of the presence of interface states (Dit) that localized at the semiconductor/oxide interface. (b) The voltage-dependent frequency dispersion in the accumulation regime as defined by [C(1 kHz)/C(1 MHz)–1] × 100%. A larger average frequency dispersion of ~11.5% seen in the weak accumulation regime indicates that a more severe interface traps are present near the mid-gap of monolayer-MoS2 with energy levels between EF < E < Ei. Hence when operates in the strong accumulation regime where the Fermi level moves away from the mid-gap traps due to an increased gate voltage, a reduction in the frequency dispersion of ~9.0% is obtained. (c) The small hysteresis (ΔV) of ~0.34 V measured in our device exemplifies the achievement of good interface between MoS2 on HfO2.

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