Extended Data Fig. 7: Thermal cycling in top-gated MoS2 FET with LiInP2S6 dielectric.
From: Solid-state thermometry via ionic–electronic coupling in two-dimensional heterostructures

a) Dual-sweep top-gate transfer characteristic of a LiInP2S6-gated MoS2 FET obtained by sweeping the \({{\rm{V}}}_{{\rm{TG}}}\) across multiple thermal cycles, with temperatures ranging from 80 °C to 30 °C. b) Temporal evolution of drain voltage (\({{\rm{V}}}_{{\rm{D}}}\)) was recorded across multiple thermal cycles exhibiting minimal variation under thermal stress.