The combination of two types of resistive material can eliminate unwanted current paths and improve the performance of resistive memory.
Computer memory comes in two broad classes: slow, non-volatile memory that can retain data without power, and fast, volatile memory that requires constant power. A universal memory suitable for both long-term storage and computation would allow simpler and faster computing devices. Tae Won Noh and colleagues1 from Seoul National University and other institutions in Korea have now demonstrated an efficient way of addressing resistive memory, increasing the speed of this promising universal memory candidate.

A common layout for a resistive memory involves sandwiching oxide materials between parallel metallic strips, which act as bottom and top electrodes (see image). The electrode crossings define small areas that act as memory bits. The resistive state of a particular bit can be either high or low, and can be set or read by applying a voltage to the appropriate top and bottom electrode lines.
This addressing scheme, known as a ‘crossbar array’, has the benefit of being compact and simple to build. However, it also presents a significant challenge: an ‘off’ (high-resistance) bit may mistakenly read as ‘on’ when its neighboring bits are on, since the current can flow through them instead. These ‘sneak paths’ can be blocked by adding transistors to each bit, but this adds considerable complexity to the device.
Noh and his colleagues have developed a simpler solution by combining two kinds of resistive materials: bipolar resistive, and threshold. Bipolar resistive materials stay in a high- or low-resistance state until a large voltage is applied to change its state, while the threshold resistive material is always in a high-resistance state when the applied voltage is low, and a low-resistance state when it is high. The current–voltage characteristic of a series combination of these materials prevents the current from flowing through neighboring bits.
The maximum bit density of the resulting cross-bar array is then limited only by how small the oxide materials can be made while still retaining their memory function. By using a sharp atomic force microscope tip as the top electrode, Noh and his colleagues showed that their device could scale down to an area of only 10 nm to a side, which corresponds to a memory density of 1.6 terabits per square inch. Noh says the next step is to investigate different material systems and explore fundamental scaling limits.
References
Chang, S. H., Lee, S. B., Jeon, D. Y., Park, S. J., Kim, G. T., Yang, S. M., Chae, S. C., Yoo, H. K., Kang, B. S., Lee, M.-J. & Noh, T. W. Oxide double-layer nanocrossbar for ultrahigh-density bipolar resistive memory. Adv. Mater. 23 4063 (2011).
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Resistive memory: A sneaky problem solved. NPG Asia Mater (2011). https://doi.org/10.1038/asiamat.2011.179
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DOI: https://doi.org/10.1038/asiamat.2011.179