Fig. 4: Temperature dependence of the electrical properties, Schottky barrier extraction, and hysteresis evaluation in monolayer MoS2 FETs with Cd contacts or Cr/Au contacts. | Nature Communications

Fig. 4: Temperature dependence of the electrical properties, Schottky barrier extraction, and hysteresis evaluation in monolayer MoS2 FETs with Cd contacts or Cr/Au contacts.

From: 2D Cd metal contacts via low-temperature van der Waals epitaxy towards high-performance 2D transistors

Fig. 4

a Temperature-dependent IDS-VGS for Cd-MoS2 FETs. b Arrhenius plots for varying gate voltages in the same Cd-MoS2 device (VGS from –25 V to 40 V). The dash-line represents the linear fitting. c Extracted ΦSB at flat-band regime for Cd-MoS₂ FETs, which corresponds to the onset of deviation from linear behavior (black dash-line). The magnitude of the extracted contact barrier can almost be neglected. The inset illustrates the linear output characteristics at low temperature. d Temperature dependence of the field effect mobility of Cd-MoS2 FETs (μ\(\propto\)T-γ). Comparison of hysteresis windows in MoS2 FETs with Cd (e) and Cr/Au (f) contacts at 300 K.

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