Fig. 5: The printed S-CCBs for circuits and passive components.

a Schematic representation of temperature-rise test of the S-CCBs. b The circuit with 4 LED used for the temperature-rise test. c Printed 1 layer and 6 layers circuits. d The relationship between the applied voltage and the electric current for the circuit with various number of layers (N = 1, 2 and 6). e Comparison of the heat generation by the printed circuit with various number of layers (N = 1, 2 and 6) subjected to different currents (1, 1.5, and 2 A). f Temperature distribution at different conditions: (i) the sample is not energized, (ii) 6 layers with 1.5 A, (iii) 2 layers with 1.5 A, (iv) 1 layer with 1.5 A. g Heating stability test in the temperature range of 0–350 °C, and h the enlarged image of (g). i Schematic diagrams of planar inductors with different sizes (L1 with line width (W) of 20 μm, line spacing (S) of 20 μm, single layer, turns of 52; L2 with line width of 10 μm, line spacing of 10 μm, 6 layers, turns of 60). j Inductance and quality factor (Q) versus frequency for inductors of L1 and L2. k The comparison of the heat generation for L1 and L2 under currents of 50 mA and 100 mA. l Schematic diagrams of interdigital electrodes (IDEs) sensor (S1 with line width of 20 μm, line spacing of 20 μm, single layer, pairs of 40; S3 with line width of 10 μm, line spacing of 10 μm, 6 layers, pairs of 40). m Impedance test results of IDEs sensors (S1, S3). The data was acquired by testing three time using one device (panels d, e, g, h, j, k, m). Data are presented as the mean values ± SD, n = 3 independent samples. Source data are provided as a Source Data file.