Fig. 1: Device structure, design, and performance. | Nature Communications

Fig. 1: Device structure, design, and performance.

From: Programmable circuits for analog matrix computations

Fig. 1

a Block diagram of the proposed universal unitary device inspired by a photonic interlaced structure where non-tunable (F) and tunable layers are intertwined in a cascaded fashion. b Sketch of the final device comprising non-tunable 50:50 power dividers (dashed-white) that mix incoming signals across all the channels so that the tunable phase elements (long-dashed-red) steer the signal to the required operation. The choice of the non-tunable layer is not restricted to a specific form, and the theoretical form of the corresponding transmission matrix can be deformed due to external fabrication defects. c Figure of merit \(L(\Phi)={{||}{\mathcal{U}}\left(\Phi\right)-{{\mathcal{U}}}_{t}{||}}^{2}/{N}^{2}\) for the interlaced structure using the theoretical \(F\) (see Methods section). The latter is depicted as a function of the number of layers (M), showing a sudden drop in the figure of merit at \(M=5\) layers. In this process, 500 Haard random matrices are generated for each M, presenting only the mean (dot) and standard deviation (shaded area). d Percentage error \(({{\mathcal{U}}\left(\Phi \right)-{{\mathcal{U}}}_{t}{||}}^{2}/{{||}{{\mathcal{U}}}_{t}{||}}^{2})\times 100{\boldsymbol{\%}}\,\) between the target and the reconstructed matrices when the previously optimized phases are replaced by 6-bit discretized phase shifters (upper panel). The lower panel presents the calibrated operation, where the discrete nature of the phase shifters is incorporated during the optimization process.

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