Fig. 3: Cryogenic direct-current characterization of C-2DEG FET.
From: Cryogenic in situ fabrication of reversible direct write logic circuits and devices
a Conceptual diagram of constructing cryogenic FET array. b The ID-VBG cyclic curve spanning a supply voltage range from 1 mV to 1000 mV. The VBG-on and VBG-off decrease significantly as VBG increases. c Comparison of ID-VBG curves of samples with substrate thicknesses of 0.2 mm and 0.5 mm respectively. VBG-on was significantly reduced from 70.5 V to 17 V due to the reduction of STO gate thickness under VDS = 50 mV. d Different VBG (from 30 V to 210 V) inject carriers to produce different conductive states under VDS = 0.5 V. e ID-VDS characteristics of C-2DEG interface under different VBG (from 5 V to 210 V). f Ion/Ioff ratio as a function with different VDS (from 0.5 mV to 500 mV). g VBG-on as a function with different VDS (from 0.5 mV to 500 mV). h Ion/Ioff ratio versus VDS in C-2DEG FET compared to other FETs with typical semiconductor channel materials. The orange dashed line represents the expected fit as reported in the ref. 41.
