Fig. 4: Monolayer-MoS2-based inverter with vdW contacts.
From: Highly reproducible van der Waals integration of two-dimensional electronics on the wafer scale
a, Structural schematics of MoS2 inverter with vdW contacts. The GND, Vin and Vout represent ground, input voltage and output voltage for the inverter, respectively. b,c, Voltage transfer characteristics (b) and the corresponding voltage gain (c) of the vdW-integrated MoS2 inverter. d, Comparison of gain as a function of Vdd with various inverters reported in the literature12,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55. e, Voltage transfer characteristics and their mirror reflection (red line), of the vdW-integrated MoS2 inverter at Vdd = 5 V. The VOH, VOL, VIL, and VIH represent the minimum high output voltage, maximum low output voltage, maximum low input voltage, and minimum high input voltage for the inverter, respectively. The noise margain can be extracted by nesting the largest possible square (grey shading) in the area enclosed by the solid lines. The dashed lines are auxiliary lines for extracting the value of VOH, VOL, VIL, and VIH. f, Total noise margin as a function of Vdd.
