Fig. 5: The vdW integration MoS2 logic gates and half-adder.
From: Highly reproducible van der Waals integration of two-dimensional electronics on the wafer scale
a, Optical microscope image of large-scale vdW-integrated logic gate arrays. b–d, Output characteristics of a NOR gate (b), NAND gate (c) and AND gate (d) fabricated by vdW integration; the insets show schematics of the gates, and all scale bars in insets are 50 μm. The Vin1 and Vin2 represent the first input voltage and the second input voltage in logic gates, respectively. e,f, Optical microscope image (e) and corresponding output characteristics (f) of a monolayer MoS2-based half-adder.
