Extended Data Fig. 6: Hybrid neural-network architecture realized with RNPU and the IBM HERMES project AIMC chip.
From: Analogue speech recognition based on physical computing
a, Network structure. The input to the network is a 1-second audio signal sampled at 12.5 kS s–1. The RNPU preprocessing produces 64 vectors of data each with 1,250 samples. Three convolution layers with kernel sizes of 8, 3 and 3 followed by a fully connected layer map the RNPU-processed signal into 10 classes. b, The RNPU output is downsampled by a factor of 10 by setting the ADC sampling rate to average every 10 points (oversampling). c, The AIMC chip consists of 256 by 256 unit cells. To implement a convolution layer, the crossbar must have a size that includes the kernel size (8 in this example) multiplied by the number of channels (64) in rows. d, Each synaptic unit cell of the AIMC chip comprises 4 phase-change-memory devices and 8 transistors (8T4R) organized in a differential configuration to allow for negative weights.
