Topology synthesis of coupled inductor based four port DC-DC converter for multi-input PV-battery application with autonomous mode selection

Abstract

Multiport converters are the most reliable and integral component for latest renewable source integration with multiple inputs. This article is one among the kind, which proposes a novel Coupled Inductor based Four Port topology Multiport Converter (CI-FP-MPC) for integrating multiple PV sources with different voltages. The adoption of coupled inductor contributes an increased voltage gain with reduced stress on the switches and diodes. In addition, reduced number of switches and diodes for a four-port topology provides an increase in efficiency due to its reduced switching and conduction losses. Also, soft switching techniques for zero-voltage-switching in switches and zero-current-switching in diodes transfers a smooth commutation between the mode transients and operating intervals. The proposed converter operates with two PV sources with battery as a source and load as well, paving to two modes of operation viz., TISO and DIDO mode respectively. The proposed topology is derived from the conventional high gain boost converter with an add-on of autonomous sensing and control logic to swap and control between the modes. To evaluate and validate its performance, the converter is developed in experimental setup with a power capability of 750 Watts. The control logic and duty cycle adjustments are supervised in Hardware-In-Loop (HIL) arrangement using dSPACE MicroLabBox. The results show increased efficiency, improved voltage gain and robust mode transition during load perturbations.

Introduction

The era of Renewable Energy Sources (RES) and Electric Vehicle (EV) technologies are a gracious gift from the science to restore the green nature from increased carbon emissions. The technological advancements in versatile energy management, power conversions and power resource restoration are mainly handled by power electronic engineering. On comparing with single sourced power systems, hybrid power systems are more reliable due to its perpetuity and adequacy¹. Initially, multiple single stage DC-DC power converters are used in hybrid power system, which are now replaced by a single multistage and multiport power converter. In precise, Multiport Power Converter (MPC) takes a single topology to receive and deliver from multiple terminals with bidirectional competency; (i.e.) they are capable of supplying the load individually and simultaneously. MPC’s application in Solar Photovoltaic (SPV) system is enormous and paves the way for effective hybrid integration with different PV panels or with different RES². Two major classifications of MPC’s are discussed in the literature with external transformer and the other with absence of windings sharing a common ground¹. The output voltage of the former MPC’s are varied either by adjusting the K-Factor of transformer and the later MPC’s by adding a controlled voltage multiplier circuit with passive components³. Topologically derived MPC with extended voltage gain ratio and improved efficiency are discussed in⁴. In which, Dual Input Dual Output (DIDO), Single Input Single Output (SISO), Single Input Dual Output (SIDO) and Dual Input Single Output (DISO) modes are elaborated with its mode transitions. A remarkable technicality of Pulsating Voltage-Source Cell (PVSC) and Pulsating Current-Source Cell (PCSC) with voltage-multiplier circuit is discussed in⁵. Pertaining to Non-Isolated MPC (NIMPC) several novel and enhanced topologies are designed and deployed specifically for SPV generation system like; three-port and three-domain with B3C topology⁶, B3R topology⁷, extendable NIMPC⁸ and certain topologies with battery inclusion^9,10 are elaborated in the literature. These MPC’s with topological variant manifolds high integration capability, decouple enabled individual control, power switching and cell efficiency with reduced stress, power management strategy between the source and battery. However, they do hold sporadic shortfalls like total counts of discrete components, absence of sharing a common capacitor, discontinuous current, power efficiency analysis with respect to loss calculation and conversion gain.

Subsequently, the aforementioned topological MPC variants are modified to the next level with magnetic element inductors¹¹. In which the output voltage was around 102 V with battery current of 5 A operating with least efficiency of 86% due to the discontinuous current switching loss under battery charging mode. Hence, to provide continuous current at the rated level, a Coupled Inductor (CI) based NIMPC is proposed in^12,13, an appreciable work was done with the primary winding of the CI is shared between the main converter and the battery charging circuit. Hence, the leakage inductance energy is utilized for the charging purpose, providing a maximum efficiency of 92.7% at 200 W and 96.5% at 80–100 W. Also¹⁴, come up with interleaved CI based NIMPC with clamp circuit with reduced order average model for effective control of the Pulse Width Modulated (PWM) pulses. The advancements in MPC with its improved PWM control strategies are summarized in¹⁵. PWM accompanied with Phase Shift Modulation (PSM) for three-port three-level converter (TP-MPC) was proposed in¹⁶ providing decoupled regulation with 97.3% efficiency in 1 kW-100 kHz system. MPC’s transformation towards a prominent topology with a Switched Capacitor (SC) integrated with bidirectional PWM delivers high power density and power balance between the source and battery^17,18. As discussed in the above literatures CI and SC based NIMPC’s advantages are blended together to deliver high power density and high battery current in¹⁹, this topological advancement includes diode-capacitor clamping circuit across the CI. This is an addon to have high gain conversion of 20 V to 380 V at the rated power of 300 W.

In addition to the CI based MPC, the most notable energy harvesting MPC interface is four port topology (FP-MPC) with multiple terminal combinations operating in MISO or SIMO with average inductor current and ripple mitigation techniques are proposed in²⁰. The key control strategy developed in⁴, competitive mode selection based on the voltage regulation is FP-MPC. In this FP-MPC series²¹, developed a FP-MPC for driving a main load and an auxiliary load in parallel. The developed converter is employed in EV for driving the motor with a capacity on one terminal and other auxiliary light loads are driven in another terminal²². However, extensive analysis on voltage and current stress with that if operating a BLDC motor was not discussed. In²³, CI-SC FP-MPC is again is remodeled with built-in transformer to provide 95.53% of full load efficiency. Also, an extensive analysis of voltage stresses starting from 40 V to 320 V was tested and validated the performance of the converter. The leakage inductance and its respective current losses were properly validated with experimental testing. As of the considering the magnetic elements, nearly six CI are used in the converter, which will eventually increase the size and cost of the converter. A novel Bipolar Boost FPC (BBFPC) proposed in²⁴, which is an outstanding topology and control logic for DC SPV integration. In this BBFPC, multifunctionality is an important criterion in which, the converter can track the MPPT, over-charging/over-discharging of battery, voltage regulation and current control. However, instead of CI, four single inductors with three output capacitors increases the complexity in order of the converter.

This article come up with a novel topology of FP-MPC derived from conventional boost converter. This FP-MPC comprises of two PV panels / arrays of different voltage and power ratings, connected to share a common load via a coupled inductor. The major contributions of this article are as follows;

• 1. Design and develop a novel FP-MPC with minimum components, capable of interfacing battery with PV sources.

• 2. Inclusion of CI based continuous current conduction to the load and the battery (when acting as a load).

• 3. Develop a bidirectional control strategy for battery charging / discharging with over-voltage or over-current protection.

• 4. Autonomous decision making in mode selection and operational interval by employing a Sense and Stay (SAS) control logic.

• 5. An extensive analysis on the case studies on source availability, efficiency calculation and comparison with existing topologies are conducted.

The remaining portion of this article is organized as; Section II discusses the topological synthesis of proposed converter from conventional boost converter. Also, the modes of operation and its respective intervals are elaborated in its sub-sections. Section III derives the control strategy and mode transition logics with relevant case analysis. Section IV and its sub-sections extensively examines the design of discrete components and its performance estimation. Section V validates the converter performance characteristics in experimental setup and comparative analysis.

Converter topology synthesis

The DC-DC converters are topologically classified in three basic variants; viz., buck, boost and buck-boost. Depending on the polarity and the passive components connection, they are sub-classified into Cuk, Zeta and SEPIC. In this list, the boost converters are commonly used in the SPV interfaces with power converters. In the aforementioned literature, boost converters are predominantly used as the basic converter, from which the succeeding MPC’s are derived. This article is one among the kind, in which, the proposed FP-MPC with Coupled Inductor (CI-FP-MPC) is basically derived from conventional boost converter and diode clamped switched capacitor circuits. The conventional and fundamental circuit for boost converter is shown in Fig. 1. Generally, in all the power converter topology, the law of conservation of energy is retained, (i.e.) the energy from the input is converted into output with an Energy Buffer (EB) to save and retrieve it. The amount of energy received is approximately equal to the amount of energy utilized apart from the losses. Hence, the input voltage port (IP) and output voltage port (OP) are buffered with EB as shown in Fig. 2.

Fig. 1

Conventional boost converter.

Fig. 2

Energy conversion between the ports.

Step-by-step topology derivation

In the proposed topology, the current-type IP with one current source and one switch is connected with voltage-type OP along with an CI as the EB. Here, the output capacitor in parallel to the loas acts as the voltage balancing component to convert the pulse-train current to pulse-train voltage, similarly the CI acts as the current balancing component to convert the pulse-train voltage to pulse-train current. By holding this basic phenomenon, the proposed CI-FP-MPC is derived from boost converter.

Fig. 3

Topology derivation of CI-FP-MPC from boost converter.

Step 1

Two boost converters with discrete components switch ($\:\varvec{S}$), inductor ($\:\varvec{L}$), diode ($\:\varvec{D}$), capacitor ($\:\varvec{C}$) and resistive load ($\:\varvec{R}$) are considered as shown in Fig. 3(a).

Step 2

The converters are connected in such a way to share the common ground with two different voltage sources $\:{\varvec{V}}_{1}$ and $\:{\varvec{V}}_{2}$ as shown in Fig. 3(b).

Step 3

Two capacitors are calculated so as to hold the charge at the rated voltage are calculated and converted into single capacitor, so as the resistive load. Also, an energy intermediary component, coupled inductor is used to serve as the current-type energy element between the input and output terminal as shown in Fig. 3(c).

Step 4

Diode clamped switched capacitors are widely used for continuous and rapid charging-discharging applications. Such circuit is illustrated in Fig. 3(d-e).

Step 5

Diode and controlled switch parallel combinations are connected in such a way to provide the bidirectional current path as shown in the Fig. 3(f).

Step 6

The modified figures in the above steps are merged together to provide a current path for the battery by replacing the capacitor as shown in Fig. 3(g).

Step 7

Two switches $\:{\varvec{S}}_{5}$ and $\:{\varvec{S}}_{6}$ are added between the line inductors and the coupled inductor for switching and providing a discharge path as well.

Step 8

In the same way two freewheeling diodes $\:{\varvec{D}}_{\varvec{F}1}$ and $\:{\varvec{D}}_{\varvec{F}2}$ for the coupled inductor primary and secondary windings respectively. Thus, the topologically transformed CI-FP-MPC is shown in Fig. 4(a).

Step 9

Two voltage sources are replaced with two SPV panels of different ratings, with different $\:{\varvec{V}}_{\varvec{m}}$. The modified and topologically transformed CI-FP-MPC with SPV inputs, lithium ion- battery as energy storing device and load port as shown in Fig. 4(b).

The topologically derived CI-FP-MPC consists of six switches $\:{S}_{1}$ to $\:{S}_{6}$ with two-line inductors $\:{L}_{1}$ and $\:{L}_{2}$ connected to a coupled inductor having $\:{L}_{P}$ as the primary winding inductance and $\:{L}_{S}$ as the secondary winding inductance. A parallel capacitor $\:C$ is connected across the load and two freewheeling diodes $\:{D}_{F1}$ and $\:{D}_{F2}$ are connected in parallel to the coupled inductor having two blocking diodes $\:{D}_{b1}$ and $\:{D}_{b2}$ in series. The CI-FP-MPC topology is capable of operating in two modes; TISO and DIDO (i.e.) when the SPV sources are deficient to supply the load demand, the battery operates a source (discharge mode) and supports the SPV to supply the load. In the same way, if the SPV sources are sufficient to supply the load demand, the battery acts as a load (charging mode) and takes the energy from SPV for charging. The elaborative steady-state operation of the individual modes and the operative mode transitions are handled by SAS logic will be discussed in the upcoming sections.

Fig. 4

Derived CI-FP-MPC employed in SPV array application.

Operating mode - TISO

The proposed CI-FP-MPC topology operating in TISO mode is analyzed in this sub-section. This operating mode comprises of six intervals in which third interval will be the transition interval from TISO to DIDO mode when the battery enters into charging mode. In Fig. 5, the broken redlines indicate the charging current path and the broken bluelines indicate the discharging current path.

Interval I (${t_0} \to {t_1}$)

At the start, the inductors $\:{L}_{1}$, $\:{L}_{2}$, $\:{L}_{P}$ and $\:{L}_{S}$ are getting charged by the SPV and battery voltages (i.e.) $\:\left({V}_{1}+{V}_{bat}\right)$ and $\:\left({V}_{2}+{V}_{bat}\right)$ to $\:{L}_{1}$ and $\:{L}_{2}$ respectively. Similarly, the coupled inductor coils are charged with switches $\:{S}_{5}$ and $\:{S}_{6}$ to provide a charging path directly from the source to load through line inductors. The switches $\:{S}_{2}$, $\:{\:S}_{3}$ and $\:{S}_{4}$ are in ON condition to provide a current path for battery during discharge. It is to be noted that, $\:{V}_{bat}$ is divided and connected in series with two individual SPV voltages. The steady-state expressions are gives as;

Fig. 5

Individual intervals in TISO mode.

$$\:{V}_{L1}=\left({V}_{1}+{V}_{bat}\right)-{V}_{P}-{V}_{0}$$

(1)

$$\:{V}_{L2}=\left({V}_{2}+{V}_{bat}\right)-{V}_{S}-{V}_{0}$$

(2)

$$\:{i}_{L1}+{i}_{L2}={i}_{C}+{i}_{0}$$

(3)

$$\:{V}_{Lk}={L}_{Lk}\frac{d{i}_{Lk}}{dt}$$

(4)

In this article, the leakage inductance is assumed to be small; as $\:{L}_{Lk}$ depends on the individual coil inductance ($\:{L}_{P}$ & $\:{L}_{S}$) and the coupling factor $\:\left(k\right)$. The value of $\:k$ is assumed to be 0.95, in such a close coupled coil, the amount of leakage factor will be very small when compared to the maximum magnitude of current [as shown in Fig. 5(a)].

Interval II (${t_1} \to {t_2}$)

The switch $\:{S}_{6}$ is turned OFF, such that the voltage $\:\left({V}_{2}+{V}_{bat}\right)$ is completely utilized for continuously charging the inductor $\:{L}_{2}$. Meanwhile, the energy stored in $\:{L}_{S}$ will be discharging to the load through $\:{D}_{F2}$ [as shown in Fig. 5(b)].

$$\:{V}_{L1}=\left({V}_{1}+{V}_{bat}\right)-{V}_{P}-{V}_{0}$$

(5)

$$\:{V}_{L2}=\left({V}_{2}+{V}_{bat}\right)$$

(6)

$$\:{i}_{L1}+{i}_{LS}={i}_{C}+{i}_{0}$$

(7)

Interval III (${t_2} \to {t_3}$)

This is an important interval in TISO mode, at time $\:{t}_{2}$, the inductors $\:{L}_{1}$, $\:{L}_{2}$ and $\:{L}_{P}$ are almost charged to the saturation level. Similarly, the chances of $\:{V}_{bat}$ with less SoC (State of Charge) is possible. Hence, this interval relieves the energy stored in $\:{L}_{1}$ and $\:{L}_{2}$ along with the SPV voltage through battery. In the same way, $\:{L}_{P}$ and $\:{L}_{S}$ gets discharge through the load and thereby providing a continuous load current [as shown in Fig. 5(c)].

$$\:{V}_{bat}=\left({V}_{1}+{V}_{L1}\right)=\left({V}_{2}+{V}_{L2}\right)$$

(8)

$$\:{i}_{bat}={i}_{L1}+{i}_{L2}$$

(9)

$$\:{i}_{LP}+{i}_{LS}+{i}_{C}={i}_{0}$$

(10)

Interval IV (${t_3} \to {t_4}$)

At $\:{t}_{3}$, the inductors $\:{L}_{1}$ and $\:{L}_{2}$ starts to charge again, whereas, the energy stored in the CI will be completely discharged to the load [as shown in Fig. 5(d)].

$$\:{V}_{L1}=\left({V}_{1}+{V}_{bat}\right)$$

(11)

$$\:{V}_{L2}=\left({V}_{2}+{V}_{bat}\right)$$

(12)

$$\:{i}_{LP}+{i}_{LS}+{i}_{C}={i}_{0}$$

(13)

Interval V (${t_4} \to {t_5}$)

At $\:{t}_{4}$, the inductors $\:{L}_{1}$ and $\:{L}_{2}$ continues to charge. Where, $\:{L}_{P}$ is sufficient to discharge and supply the load along with $\:{L}_{S}$. Hence, the load is supplied by the discharging current of $\:{L}_{P}$ and charging current of $\:{L}_{S}$ [as shown in Fig. 5(e)].

$$\:{V}_{L1}=\left({V}_{1}+{V}_{bat}\right)$$

(14)

$$\:{V}_{L2}=\left({V}_{2}+{V}_{bat}\right)-{V}_{S}-{V}_{0}$$

(15)

$$\:{i}_{L1}+{i}_{LS}={i}_{C}+{i}_{0}$$

(16)

Interval VI (${t_5} \to {t_6}$)

The inductors $\:{L}_{1}$ and $\:{L}_{2}$ along with SPV voltages directly supply the load and CI without the action of the battery. This interval is nearly same as DISO [as shown in Fig. 5(f)].

$$\:{V}_{L1}=\left({V}_{1}+{V}_{bat}\right)$$

(17)

$$\:{V}_{L2}=\left({V}_{2}+{V}_{bat}\right)$$

(18)

$$\:{i}_{LP}+{i}_{LS}={i}_{C}+{i}_{0}$$

(19)

Operating mode - DIDO

In this DIDO mode, the switches $\:{\:S}_{3}$ and $\:{S}_{4}$ will OFF in all the intervals, such that it turns ON the diodes $\:{D}_{1}$ and $\:{D}_{2}$ as well. The ultimate objective of this mode is to charge the battery when the SPV is abundance and SoC of the battery is low below the threshold. As like the TISO mode, DIDO mode comprises of six intervals and each interval has its own individual current path as shown in Fig. 6.

Interval I (${t_0} \to {t_1}$)

At the start, the individual SPV voltages are capable of supplying the inductors $\:{L}_{1}$, $\:{L}_{2}$, $\:{L}_{P}$ and $\:{L}_{S}$ to charge and store the energy. Also, switches $\:{\:S}_{1}$ and $\:{S}_{2}$ are in ON condition so as to provide a joint current path from charging the battery [as shown in Fig. 6(a)].

$$\:{V}_{L1}=\left({V}_{1}-{V}_{bat}\right)-{V}_{P}-{V}_{0}$$

(20)

$$\:{V}_{L2}=\left({V}_{2}-{V}_{bat}\right)-{V}_{S}-{V}_{0}$$

(21)

$$\:{i}_{L1}+{i}_{L2}={i}_{C}+{i}_{0}$$

(22)

$$\:{i}_{bat}={i}_{L1}+{i}_{L2}$$

(23)

Interval II (${t_1} \to {t_2}$)

At $\:{t}_{2}$, the SPV voltage $\:{V}_{1}$ is specifically used for charging $\:{L}_{1}$ and $\:{L}_{P}$ by opening the switch $\:{S}_{1}$. Here, the expressions (20) to (22) remains the same, except the battery current [as shown in Fig. 6(b)].

Fig. 6

Individual intervals in DIDO mode.

$$\:{i}_{bat}={i}_{L2}-{i}_{LS}$$

(24)

Interval III (${t_2} \to {t_3}$)

At $\:{t}_{3}$, SPV voltage $\:{V}_{2}$ and $\:{V}_{L2}$ are explicitly used for charging the battery and that of the $\:{V}_{1}$ is used for charging $\:{L}_{1}$ and $\:{L}_{P}$. As the switch $\:{S}_{6}$ is opened, the load is supplied by the discharge current of $\:{L}_{S}$ along with $\:{L}_{P}$ [as shown in Fig. 6(c)].

$$\:{V}_{L1}=\left({V}_{1}-{V}_{bat}\right)-{V}_{P}-{V}_{0}$$

(25)

$$\:{V}_{L2}=\left({V}_{2}-{V}_{bat}\right)$$

(26)

$$\:{i}_{0}={i}_{L1}+{i}_{LP}$$

(27)

$$\:{i}_{bat}={i}_{L2}$$

(28)

$$\:{i}_{L1}+{i}_{LS}={i}_{C}+{i}_{0}$$

(29)

Interval IV (${t_3} \to {t_4}$)

In this interval, the switches $\:{\:S}_{5}$and $\:{S}_{6}$ are turned OFF, thus $\:{\:S}_{1}$ turns ON and provides a combined current path with the discharge of $\:{V}_{L1}$ and $\:{V}_{L2}$ along with $\:{V}_{1}$ and $\:{V}_{2}$ [as shown in Fig. 6(d)].

$$\:{V}_{L1}=\left({V}_{1}-{V}_{bat}\right)$$

(30)

$$\:{V}_{L2}=\left({V}_{2}-{V}_{bat}\right)$$

(31)

$$\:{i}_{LP}+{i}_{LS}+{i}_{C}={i}_{0}$$

(32)

$$\:{i}_{bat}={i}_{L1}+{i}_{L2}$$

(33)

Interval V (${t_4} \to {t_5}$)

At $\:{t}_{5}$, SPV voltage $\:{V}_{1}$ and $\:{V}_{L1}$ are explicitly used for charging the battery and $\:{V}_{2}$ is used for charging $\:{L}_{2}$ and $\:{L}_{S}$. As the switch $\:{S}_{5}$ is opened, the load is supplied by the discharge current of $\:{L}_{P}$ along with $\:{L}_{S}$ [as shown in Fig. 6(e)].

$$\:{V}_{L1}=\left({V}_{1}-{V}_{bat}\right)$$

(34)

$$\:{V}_{L2}=\left({V}_{2}-{V}_{bat}\right)-{V}_{S}-{V}_{0}$$

(35)

$$\:{i}_{LP}+{i}_{L2}-{i}_{bat}={i}_{C}+{i}_{0}$$

(36)

$$\:{i}_{bat}={i}_{L1}$$

(37)

Interval VI (${t_5} \to {t_6}$)

In this interval, $\:{L}_{2}$ discharges to charge battery. Load is supplied by $\:{L}_{1}$ and CI [as shown in Fig. 6(f)].

$$\:{V}_{L1}=\left({V}_{1}-{V}_{bat}\right)-{V}_{P}-{V}_{0}$$

(38)

$$\:{V}_{L2}=\left({V}_{2}-{V}_{bat}\right)-{V}_{S}-{V}_{0}$$

(39)

$$\:{i}_{LP}+{i}_{LS}={i}_{C}+{i}_{0}$$

(40)

$$\:{i}_{bat}={i}_{L2}-{i}_{LS}$$

(41)

In this article extensive analysis is made on deriving the expressions for $\:{V}_{0}$ with respect to $\:{L}_{1}$ and $\:{L}_{2}$ individually for each mode to understand the influence of line inductors with respect to adequate functioning of CI and capacitor. To start with, the steady state equations of TISO mode derived in the above sub-sections are employed in volt-sec balance equation. Equation (42) expresses the volt-sec equation for $\:{L}_{1}$ with its respective duty cycles.

$$\:{I}_{L1}=\frac{1}{{L}_{1}}\left[{\int\:}_{0}^{{d}_{5}{T}_{s}\:\:}2{V}_{L1}dt+{\int\:}_{{d}_{5}.{T}_{s}}^{\left({{d}_{1}+1-d}_{5}\right){T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{\left({{d}_{1}+1-d}_{5}\right){T}_{s}}^{\left({{d}_{1}+{d}_{3}+1-d}_{5}\right){T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{\left({{d}_{1}+{d}_{3}+1-d}_{5}\right){T}_{s}}^{\left({1-d}_{5}\right){T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{\left({1-d}_{5}\right){T}_{s}\:}^{\left({{d}_{1}+1-d}_{5}\right){T}_{s}\:\:}{V}_{L1}dt\right]$$

(42)

On solving (42), $\:{V}_{0}$ for TISO is given as (43).

$$\:{V}_{0}=\frac{\begin{array}{c}{V}_{1}\left({{d}_{1}-2d}_{5}\right)+{V}_{bat}\left({{d}_{1}+1-4d}_{5}\right)\\\:-{V}_{LP}\left({{d}_{1}+2d}_{5}\right)\end{array}}{\left({{d}_{1}-2d}_{5}\right)}$$

(43)

Similarly, for $\:{L}_{2}$ carrying $\:{I}_{L2}$ is written as,

$$\:{I}_{L2}=\frac{1}{{L}_{2}}\left[{\int\:}_{0}^{{d}_{6}{T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{{d}_{6}.{T}_{s}}^{\left(\left({{d}_{2}+d}_{3}+{d}_{4}\right)-1\right){T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{\left({{d}_{2}+d}_{3}+{d}_{4}\right)-1.{T}_{s}}^{\left({{d}_{2}-d}_{6}\right){T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{\left({{d}_{2}-d}_{6}\right).{T}_{s}\:}^{\left(\left({{d}_{2}+d}_{3}+{d}_{4}\right)-1\right){T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{\left({{d}_{2}+d}_{3}+{d}_{4}\right)-1.{T}_{s}\:}^{{d}_{6}{T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{{d}_{6}.{T}_{s}\:}^{\left({1-d}_{6}\right){T}_{s}\:\:}{V}_{L2}dt\right]$$

(44)

On solving (44), $\:{V}_{0}$ for TISO is given as (45).

$$\:{V}_{0}={V}_{LS}-\frac{\left({V}_{2}-{V}_{bat}\right)\left({{d}_{2}+d}_{3}+{d}_{4}-2{d}_{6}-1\right)}{{d}_{6}}$$

(45)

In the same way, steady state equations of DIDO mode derived in the above sub-sections are employed in volt-sec balance equation.

$$\:{I}_{L1}=\frac{1}{{L}_{1}}\left[{\int\:}_{0}^{\left({{d}_{1}+d}_{5}\right){T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{\left({{d}_{1}+d}_{5}\right){T}_{s}}^{{d}_{5}{T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{{d}_{5}{T}_{s}}^{\left({{d}_{1}+(1-d}_{5}\right)){T}_{s}\:\:}{V}_{L1}dt+{\int\:}_{\left({{d}_{1}+(1-d}_{5}\right)){T}_{s}\:}^{{d}_{5}{T}_{s}\:\:}{V}_{L1}\right]$$

(46)

On solving (46), $\:{V}_{0}$ for DIDO is given as (47).

$$\:{V}_{0}=\:\left({V}_{1}-{V}_{bat}\right)-\:{V}_{LP}-\:\:\:\frac{\left({V}_{1}-{V}_{bat}\right)\left(4{d}_{5}-2{d}_{1}-2\right)}{{d}_{5}-2{d}_{1}+1}$$

(47)

Similarly, for $\:{L}_{2}$ carrying $\:{I}_{L2}$ is written as,

$$\:{I}_{L2}=\frac{1}{{L}_{2}}\left[{\int\:}_{0}^{\left({d}_{2}+{d}_{6}\right){T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{\left({d}_{2}+{d}_{6}\right){T}_{s}}^{\left({d}_{2}+(1-{d}_{6})\right){T}_{s}\:\:}{V}_{L2}dt+{\int\:}_{\left({d}_{2}+(1-{d}_{6})\right){T}_{s}\:}^{\:{d}_{6}.{T}_{s}}{V}_{L2}dt+{\int\:}_{{d}_{6}.{T}_{s}}^{\left({d}_{2}+{d}_{6}\right){T}_{s}\:\:}{V}_{L2}dt+\right]$$

(48)

On solving (48), $\:{V}_{0}$ for DIDO is given as (49).

$$\:{V}_{0}=\:\left({V}_{2}-{V}_{bat}\right)-\:{V}_{LS}-\:\:\:\frac{\left({V}_{2}-{V}_{bat}\right)\left(4{d}_{6}-2\right)}{\left({2d}_{2}+4{d}_{6}-1\right)}$$

(49)

From the above expressions on $\:{V}_{0}$, it is inferred that, the role of $\:{V}_{P}$ and $\:{V}_{S}$ of CI is crucial and it should be capable enough in storing and supplying the load without any discontinuity as shown in Fig. 7 depicting, the steady state waveforms of TISO and DIDO mode. Hence, they can be expressed with coupling coefficient $\:\left(k\right)$ and mutual inductance $\:\left(M\right)$ as,

$$\:{V}_{P}=\frac{{L}_{p}{L}_{s}\left(1-\:{k}^{2}\right)}{{L}_{S}-M}$$

(50)

$$\:{V}_{S}=\frac{{L}_{p}{L}_{s}\left(1-\:{k}^{2}\right)}{{L}_{p}-M}$$

(51)

On applying the number of coils turns $\:\left(N\right)$ and core constants $\:{C}_{P}$ and $\:{C}_{S}$ of primary and secondary respectively, the expressions (50–51) can be rewritten as,

$$\:{V}_{P}={C}_{P}{N}^{2}\frac{d{i}_{S}}{dt}\:\text{and}\:{V}_{S}={C}_{S}{N}^{2}\frac{d{i}_{P}}{dt}\:$$

(52)

On equating (50–52), the expression for change in individual coil current is given as,

$$\:\frac{d{i}_{P}}{dt}=\frac{{L}_{p}{L}_{s}\left(1-\:{k}^{2}\right)}{{C}_{P}{N}^{2}\left({L}_{S}-M\right)}$$

(53)

$$\:\frac{d{i}_{S}}{dt}\:=\frac{{L}_{p}{L}_{s}\left(1-\:{k}^{2}\right)}{{C}_{S}{N}^{2}\left({L}_{p}-M\right)}$$

(54)

Fig. 7

Steady state waveforms (a) TISO and (b) DIDO mode.

Fig. 8

Control signal generation for SAS logic.

Fig. 9

Control circuit with switching sequence for FP-MPC.

Converter control strategy

In the proposed CI-FP-MPC, the control strategy for continuous voltage supply from source to load and load regulation are the prime important parameters. As suggested in the literature^4,25, the MPC control technique should have dependencies over the source (SPV), over the load current with appreciable load regulation and the coordinated charging and discharging of battery. Having this in mind, this paper proposes a bidirectional control strategy adhering with the battery SoC and SPV source availability, also an exclusive add-on control of mode selection with proper duty cycle interval through SAS logic. Initially, the PV sources are engaged with MPPT controller, executing a conventional incremental conductance method for delivering peak power from the individual resources. Similarly, the battery charge controller executes the SoC level comparison and controls the charging and discharging of the battery. These individual sensed voltage signals are sent to the control logic for generation of control signals as shown in Fig. 8.

The signals $\:{\varvec{V}}_{\varvec{C}\varvec{S}1}$ and $\:{\varvec{V}}_{\varvec{C}\varvec{S}2}$ depicts the power flow of the SPV and its respective MPPT controller functioning. The available percentage of SPV voltage and power is converted into $\:0\to\:1$ such that is compared with the sawtooth for the generation of pulses for regulating the SPV voltage to the input terminal of the FP-MPC. In the same way, SoC of the battery is monitored and compared with the threshold level. The required power demand $\:{\varvec{P}}_{\varvec{O}}$ is estimated from the respective output voltage and current sensors. This again is compared with $\:{\varvec{P}}_{\varvec{P}\varvec{V}1}$ and $\:{\varvec{P}}_{\varvec{P}\varvec{V}2}$ for the generation of $\:{\varvec{C}}_{\varvec{S}1}$, $\:{\varvec{C}}_{\varvec{S}2}$ and $\:{\varvec{C}}_{\varvec{S}3}$ as shown in Fig. 9. It is to be noted that, the control signals are generated are used in the switching pulse generation with respective to its corresponding duty cycle. The overall control strategy is named as Sense and Stay (SAS), in which the sensed signals are sent to the pre-control unit as shown in Fig. 9 for generation of the control signal. These signals are sent to the SAS unit along with the inductor current slope; then, based on the algorithm the controller will decide the mode of operation and activate the required intervals (i.e.) the required switching sequences. From Fig. 10, the detailed schematic representation is shown, which depicts the systematic flow of mode selection. An elaborated discussion with case analysis is conducted to analyze the validation of the SAS logic.

Case-1

When the demand power $\:{\varvec{P}}_{\varvec{O}}$ is higher than both $\:{\varvec{P}}_{\varvec{P}\varvec{V}1}$ and $\:{\varvec{P}}_{\varvec{P}\varvec{V}2}$. The control signal $\:{\varvec{C}}_{\varvec{S}3}\:$is immediately checked for high indicating the sufficient level of SoC from the battery.

That is $\:{\varvec{C}}_{\varvec{S}1}=0$, $\:{\varvec{C}}_{\varvec{S}2}=0$ and $\:{\varvec{C}}_{\varvec{S}3}=1$, which means $\:\left({\varvec{V}}_{1}+{\varvec{V}}_{\varvec{b}\varvec{a}\varvec{t}}\right)$ and $\:\left({\varvec{V}}_{2}+{\varvec{V}}_{\varvec{b}\varvec{a}\varvec{t}}\right)$ contributes the demand by turning $\:{\varvec{S}}_{5}$ and $\:{\varvec{S}}_{6}$ to ON condition. Also, the slope values calculated with the inductor current sensor will give the signal of increasing or decreasing slope. Hence, the energy stored in the inductor can be easily determined. Since the SPV sources are not sufficient to supply the load current, the line inductors and CI are ready to discharge and supply the load. Thus, the coils are in discharge mode showcasing a negative slope. Hence, the possible mode is TISO and required interval is Interval III or VI.

Fig. 10

SAS control logic schematic for closed loop pulse generation.

Case-2

When $\:{P}_{PV1}$ is sufficient to supply the load and $\:{P}_{PV2}$ along with battery will be used to charge the line inductor which was discharged in the previous intervals. That is $\:{C}_{S1}=1$, $\:{C}_{S2}=0$ and $\:{C}_{S3}=1$, which means $\:{V}_{1}$ supplies the load and $\:\left({V}_{2}+{V}_{bat}\right)$ contributes in charging the inductor. $\:{S}_{5}$ in ON condition and $\:{S}_{6}$ in OFF condition, hence $\:{L}_{S}$ free wheels through $\:{D}_{F2}$ and load as well. Hence, the possible mode is TISO and required interval is Interval II.

Case-3

When $\:{P}_{PV2}$ is sufficient to supply the load and $\:{P}_{PV1}$ along with battery will be used to charge the line inductor which was discharged in the previous intervals. That is $\:{C}_{S1}=0$, $\:{C}_{S2}=1$ and $\:{C}_{S3}=1$, which means $\:{V}_{2}$ supplies the load and $\:\left({V}_{1}+{V}_{bat}\right)$ contributes in charging the inductor. $\:{S}_{6}$ in ON condition and $\:{S}_{5}$ in OFF condition, hence $\:{L}_{P}$ free wheels through $\:{D}_{F1}$ and load as well. Hence, the possible mode is TISO and required interval is Interval V.

Case-4

When the demand power $\:{P}_{O}$ is low than available $\:{P}_{PV1}$ and $\:{P}_{PV2}$. Then, the SPV power is used to charge the inductors and the battery, whereas, $\:{L}_{P}$ and $\:{L}_{S}$ discharges to supply the load for short interval. That is $\:{C}_{S1}=0$, $\:{C}_{S2}=1$ and $\:{C}_{S3}=1$, which means the converters switches to DIDO mode. Hence, the possible mode is TISO and required interval is Interval IV. In this pattern, the SAS control logic decides the mode of operation.

$$\:{L}_{1}\frac{{di}_{L1}}{dt}\ge\:\left({V}_{1}+{V}_{bat}\right)-\:{C}_{p\:\:}.\:{N}^{2}\frac{{di}_{Lp}}{dt}-\:\left[\frac{{V}_{1}\left({d}_{1}-2{d}_{5}\right)+{V}_{bat}\left({d}_{1}-4{d}_{5}+1\right)-{V}_{P}\left({d}_{1}-2{d}_{5}\right)}{\left({d}_{1}-2{d}_{5}\right)}\right]$$

(55)

$$\:{L}_{1}\:\:\ge\:\frac{2R\left[\left({V}_{bat}-{V}_{P}\right)2{d}_{5}-{V}_{bat}-{V}_{P}\:{d}_{1}-\frac{{L}_{p\:}\:{L}_{S}}{\left({L}_{S}-M\right)}\:.\left(1-\:{k}^{2}\right)\left({d}_{1}-2{d}_{5}\right)\right]}{{V}_{0}{f}_{s}\left({d}_{1}-2{d}_{5}\right)}$$

(56)

$$\:{L}_{1}\:\:\ge\:\frac{2R}{\left({d}_{1}-2{d}_{5}\right){V}_{0}{f}_{s}}\left[{V}_{bat}\left(2{d}_{5}-1\right)-\frac{{L}_{p\:}\:{L}_{S}}{\left({L}_{S}-M\right)}\left(1-\:{k}^{2}\right)2{d}_{1}\right]$$

(57)

$$\:{L}_{2}\:\:\ge\:\frac{2R}{{V}_{0}{f}_{s}{d}_{6}}\left[\left({V}_{2}+{V}_{bat}\right)\left({d}_{2}+{d}_{3}+{d}_{4}-{d}_{6}-1\right)-\frac{{L}_{p\:}\:{L}_{S}}{\left({L}_{p}-M\right)}\left(1-\:{k}^{2}\right)2{d}_{6}\right]$$

(58)

Design of dicrete components

Inductor selection

In the proposed CI-FP-MPC, apart from the switches and snubber circuits, the important discrete components are the line inductors, output capacitor and coupled inductor.

In order to have continuous load current, the line inductors have to adhere with the inductor currents ($\:{i}_{L1}$, $\:{i}_{L2})$ and battery current ($\:{i}_{bat}$) flowing through the circuit. Also, the inductor currents should be greater than at least half of the ripple current for providing continuous current ²⁶. Based on the steady state equations, the minimum current flowing through the battery is $\:{i}_{L2}$ and the maximum current flowing through the battery is $\:\left({i}_{L1}+{i}_{L2}\right)$. Let us consider the individual inductor voltage equations from (1), (2), (5) and (6) and apply the individual expressions derived in (43), (45) and (52), it is derived to (55). On substituting the inductor ripple current general equation in (55) along with (53), it is simplified to (56) and (57). In the same way, the expression for $\:{L}_{2}$ is derived as (58).

Fig. 11

Voltage and current stress during conduction.

Capacitor selection

The value of capacitor depends on the average output voltage with a compromise of 5% in maximum peak voltage.

$$\:{C}_{O}=\frac{{I}_{O}}{2\varDelta\:{V}_{0}}{d}_{x}.{T}_{S}$$

(59)

Where, the value $\:{d}_{x}$ indicates the duty cycle of the six switches. Specifically, $\:{d}_{5}$ and $\:{d}_{6}$ will be included during the capacitor charging interval (i.e.) Interval-III in TISO mode and Interval-IV in DIDO mode. The output current and switching frequency are included with the permissible voltage ripple as (60).

$$\:{C}_{O}\ge\:\frac{{V}_{O}}{{R}_{O}{f}_{s}\left(\frac{\varDelta\:{V}_{0}}{{V}_{O}}\right)}{d}_{x\left(max\right)}.({V}_{O}-\left({V}_{1}+{V}_{2}\right))$$

(60)

Selection of switches and diodes

The selection of switches and diodes depends on the on-state current stress and maximum Peak Inverse Voltage (PIV) respectively. In TISO mode, switches $\:{\:S}_{1}$, $\:{\:S}_{2}$ and $\:{S}_{3}$ are in ON condition in most of the intervals. Similarly, diodes $\:{\:D}_{1}$ and $\:{D}_{2}$ are almost OFF in all the intervals. Hence, it is mandatory to estimate the maximum current and voltage stress for the switches and maximum reverse voltage for the diodes. The possible current path and voltage across diode and switches are shown in Fig. 11. From the steady state expressions, voltage across the switches is expressed as follows;

$$\:{V}_{S1}=\:\left\{\begin{array}{c}\left(\left({V}_{1}+{V}_{bat}\right)\left|\right|\left({V}_{2}+{V}_{bat}\right)\right)\forall\:\:\left({{d}_{1}+2d}_{5}\right)\\\:\left(\frac{{\:V}_{bat}}{2}\left({V}_{1}+{V}_{2}\right)\:\right)\forall\:\:\left({{d}_{2}-d}_{6}\right)\end{array}\right.$$

(61)

$$\:{V}_{S2}=\:\left\{\begin{array}{c}\left({V}_{2}+{V}_{bat}\right)\:\forall\:\:\left({{d}_{2}-d}_{6}\right)\\\:\left(\left({V}_{1}+{V}_{bat}\right)\left|\right|\left({V}_{2}+{V}_{bat}\right)\right)\forall\:\:{d}_{2}+(1-{d}_{6})\end{array}\right.$$

(62)

$$\:{V}_{S3}=\:\left\{\begin{array}{c}\left({V}_{2}+{V}_{bat}\right)\:\forall\:\:\left({{d}_{2}+d}_{3}+{d}_{4}\right)-1\\\:\left({V}_{1}+{V}_{bat}\right)+\left({V}_{2}+{V}_{bat}\right)\forall\:\:\left({{d}_{2}+d}_{3}\right)-1\end{array}\right.$$

(63)

$$\:{V}_{S4}=\frac{{V}_{bat}*{d}_{4}}{{V}_{0}(1-{d}_{4})}$$

(64)

In the same way, diodes $\:{\:D}_{1}$ and $\:{D}_{2}$ are almost OFF in all the intervals of TISO mode and always ON in DIDO mode. Hence, maximum magnitude of current flows through the diode during DIDO mode. This can be expressed as,

$$\:{I}_{D1}=\:{I}_{D2}=\left({I}_{L1}+{I}_{L2}+\frac{{I}_{bat}}{2}\:\right)\forall\:\:DIDO$$

(65)

Fig. 12

Power loss calculation for discrete components.

Selection of coupled inductor (CI)

The main purpose of using CI in this topology is to significantly contribute a continuous current flow with zero ripples during the intervals and its transitions as well. Hence, the coupling factor, mutual inductance and leakage inductances are carefully estimated. The turns ratio is considered as 1:1, hence the voltage drop across the primary and secondary windings will be same with respect to $\:N$. However, the input voltage to the CI may differ according to the SPV sources.

On considering the equations (51) to (54), with $\:M=k\sqrt{{{L}_{P}.L}_{S\:}}$ and leakage factor $\:\sigma\:=1-\frac{{{L}_{M}}^{2}}{{{L}_{P}.L}_{S\:}}$, the following inequalities has to be satisfied.

$$\:\frac{d{i}_{LP}}{dt}\ge\:\frac{{V}_{S}+\frac{M}{{L}_{P}}{V}_{P}}{{L}_{ks}}$$

(66)

$$\:\frac{d{i}_{LS}}{dt}\ge\:\frac{{V}_{P}+\frac{M}{{L}_{S}}{V}_{S}}{{L}_{kp}}$$

(67)

Voltage and current stress

The switches employed in the converter experiences voltage and current stress during their commutation. This can be expressed by using the MOSFET drain current $\:\left({I}_{DX}\right)$, source current $\:\left({I}_{SX}\right)$, drain-source voltage $\:\left({V}_{DSX}\right)$ and power rating $\:\left({P}_{X}\right)$. In this article, switches $\:{\:S}_{2}$, $\:{\:S}_{3}$ and $\:{S}_{4}$ experiences the maximum V-I stress in both the modes and they can be expressed as,

$$\:{I}_{stress\_2}=\:\frac{\left({V}_{2}+{V}_{bat}-{V}_{L2}\right)\left({I}_{D2}+{I}_{D3}+{I}_{D4}\right)\left({d}_{2}+{d}_{3}+{d}_{4}\right)}{R\left({I}_{S2}+{I}_{S3}+{I}_{S4}\right)}$$

(68)

$$\:{I}_{stress\_3}=\:\frac{\left[\left({V}_{1}+{V}_{2}+\frac{{V}_{bat}}{2}\right)-{V}_{L1}-{V}_{L2}\right]\left[{I}_{DS2}+{I}_{DS2}+{I}_{DS3}+{I}_{DS4}\right]\left({d}_{1}+{d}_{2}+{d}_{3}\right)}{\left({I}_{S1}+{I}_{S2}+{I}_{S3}+{I}_{S4}\right)\left(1-{d}_{4}\right)}$$

(69)

$$\:{I}_{stress\_4}=\:\frac{\left[\left({V}_{1}+{V}_{2}+\frac{{V}_{bat}}{2}\right)-{V}_{L1}-{V}_{L2}\right]\left[{I}_{DS1}+{I}_{DS3}+{I}_{DS4}\right]\left({d}_{1}+{d}_{3}\right)}{\left({I}_{S1}+{I}_{S3}+{I}_{S4}\right)\left(1-{d}_{4}\right)}$$

(70)

Efficiency analysis

In order to analyze the efficiency of the proposed CI-FP-MPC, power loss calculation for the entire converter including its sources have to be calculated. However, the SPV thermal losses and MPPT tracking and conversion losses are ignored for analysis. Hence, the various power loss possibilities pertaining to switches, diodes, coupled inductor and gate drivers are exclusively included. To start with, power loss in switches include conduction loss $\:\left({P}_{S\_cond}\right)$ and switching loss $\:\left({P}_{S\_SW}\right)$ with respect to on-state resistance $\:\left({r}_{ON}\right)$. In the same way, power loss in diodes include conduction loss $\:\left({P}_{D\_cond}\right)$ and switching loss $\:\left({P}_{D\_SW}\right)$ with respect to diode resistance $\:\left({R}_{D}\right)$.

$$\:{P}_{S\_cond}={{I}_{0}}^{2}\:{r}_{ON}*{V}_{0}$$

(71)

$$\:{P}_{S\_SW}=\frac{1}{2}\:\left({V}_{1}+{V}_{2}\right){I}_{0}\left({t}_{r}+{t}_{f}\right){f}_{s}$$

(72)

$$\:{P}_{D\_cond}=\:{{I}_{RMS}}^{2}\:{R}_{D}*{V}_{F}{I}_{F\left(avg\right)}$$

(73)

$$\:{P}_{D\_SW}=\frac{1}{2}\:{C}_{R}{{V}_{R}}^{2}{f}_{s}+\frac{1}{6}\:{I}_{RR}{V}_{R}{t}_{rr}{f}_{s}$$

(74)

The power loss for a single switch and diode is given as;

$$\:{P}_{Loss\_Sw\_x}={P}_{S\_cond\_x}+{P}_{S\_SW\_x}$$

(75)

$$\:{P}_{Loss\_D\_x}={P}_{D\_cond\_x}+{P}_{D\_SW\_x}$$

(76)

Likewise, power loss for the all the switches and diodes are expressed as,

Fig. 13

SPV array connections with the CI-FP-MPC.

$$\:{P}_{Loss\_Sw}={P}_{Loss\_Sw\_1}+{P}_{Loss\_Sw\_2}+{P}_{Loss\_Sw\_3}+{P}_{Loss\_Sw\_4}$$

(77)

$$\:{P}_{Loss\_D}={P}_{Loss\_D\_1}+{P}_{Loss\_D\_2}$$

(78)

In the same way, power loss for the coupled inductor can be given with the core loss and copper loss on the primary and secondary windings. Core loss is given using Steinmetz formula and mostly it is a constant and changes with $\:{f}_{s}$. However, depending on the magnitude of the current flowing through the winding, the copper loss will also be changing and it can be given as,

$$\:{P}_{Loss\_CI\_primary}={{i}_{LP}}^{2}\:{\rho\:}_{T}\:{A}_{T}$$

(79)

$$\:{P}_{Loss\_CI\_secondary}={{i}_{LS}}^{2}\:{\rho\:}_{T}\:{A}_{T}$$

(80)

Where, $\:{\rho\:}_{T}$ and $\:{A}_{T}$ are the resistivity and cross-sectional area of the windings. In addition, gate drivers play crucial role in driving the pulses to the switches at appropriate switching frequency. Hence, the gate driver loss is given with MOSFET charge $\:\left({Q}_{g}\right)$ and gate-source voltage $\:\left({V}_{GS}\right)$.

$$\:{P}_{Loss\_G}={Q}_{g}{V}_{GS}{f}_{s}$$

(81)

Now, the total power loss is estimated as,

$$\:{P}_{Loss}={P}_{Loss\_Sw}+{P}_{Loss\_D}+{P}_{Loss\_CI}+6{P}_{Loss\_G}$$

(82)

The power loss of the discrete components and that of the total power loss operating at different rated power is estimated and plotted in the 3-D bar chart Fig. 12. It is evident that total power loss is maximum when it is operated in low rated power of 200 Watts. Most of the power loss portion is due to the switch and diode around 30 Watts and 13.45 Watts respectively when operating in 1000 Watts. Comparing with line inductors, coupled inductors dissipate less power in the range of 2.8 Watts. It is to be noted that, even though the rated power is 750 Watts, the power loss calculation is estimated until 1000 Watts. By virtue, the power loss calculations are executed on the speculation of the discrete components exposed to 125% of the rated power.

Experimental verification and comparative analysis

Experimental results

The experimental validation of the proposed CI-FP-MPC is implemented in HIL platform using dSPACE MicroLabBox. The converter is designed as per the specification given in Table 1 with a power rating of 1000 Watts. Two SPV sources of 1005 Watts and 450 Watts are connected as the source as shown in Fig. 13. Three panels of 335 Watts each connected in series providing a source voltage of 37.48 V and current of 26.82 A (Maximum). Similarly, three panels of 150 Watts each connected in series providing a source voltage of 56.1 V and current of 8.2 A (Maximum). These two PV sources are connected to the CI-FP-MPC with MPPT controller for providing regulated voltage to the converter. A Li-ion battery stack 84Ah capacity is used as the auxiliary source with inbuilt BMS for charging and discharging. BNC cables are used to connect the voltage and current sensors of the converter ports to the MicroLabBox control panel. The signals are appropriately conditioned and sent into the control logic for executing the algorithm. Likewise, the control signals and the duty cycle signals are appropriately conditioned before entering converter. PWM signals are driven by Semikron SKYPER32 driver with gate voltage of 15 V. Blocking and freewheeling diodes are chosen based on their application in the circuit, (i.e.) blocking diodes positions are placed with fast recovery diode having 15 A as the diode current and 280 V to 400 V reverse voltage and free wheel diodes are placed with 15 A Schottky diode. In TISO mode, both SPV sources and battery are operated together to deliver the load of 450 Watts under partial shading conditions of the array. The switching sequence of the TISO mode for the six switches $\:{\:\varvec{S}}_{4}$ to $\:{\:\varvec{S}}_{6}$ and $\:{\:\varvec{S}}_{1}$ to $\:{\:\varvec{S}}_{2}$ operating in 20 kHz are shown in Fig. 14.a and Fig. 14.d respectively.

Table 1 Specification of the hardware.

Fig. 14

Steady state experimental waveforms in TISO mode.

The line inductor current $\:\left({\:\varvec{I}}_{\varvec{L}1}\right)$ of 3.6 A due to the switching of $\:{\varvec{S}}_{5}$ and the coupled inductor primary side current $\:\left({\varvec{I}}_{\varvec{L}\varvec{P}}\right)$ of 2.8 A is shown in Fig. 14.b. In Fig. 14.e, the output load current of 3.4 A and capacitor current of 0.6 A with charging and discharging patterns are shown. Switch $\:{\:\varvec{S}}_{2}$ is responsible for connecting the battery when $\:{\varvec{P}}_{\varvec{P}\varvec{V}2}$ is insufficient and it can be as shown inn from Fig. 14.e and 14.h, the duty cycle of $\:{\:\varvec{S}}_{2}$ is almost changed from 0.55 to 0.91 resulting the continuous connection of battery in the converter. Also, it is to be noted in Fig. 14.h, the addition of $\:{\varvec{I}}_{\varvec{B}\varvec{a}\varvec{t}}$ permits certain amount of ripple in the output current. Likewise, the charging and discharging of the coupled inductor windings and its respective change in current during the TISO mode in shown in Fig. 14.c and 14.f. Pertaining to the ZVS and ZCS, Fig. 14.g and 14.i illustrates the switching of coupled inductor voltage and voltage across the diode. In the similar manner, the DIDO mode experimental results are Illustrated in Fig. 15, in which the switches $\:{\:\varvec{S}}_{3}$ and $\:{\:\varvec{S}}_{4}$ are turned OFF for the entire operating mode (As shown in Fig. 15.a and 15.d). In DIDO mode, both panels maximum power is sufficient to supply the load, hence the switch $\:{\varvec{S}}_{2}$ is ON in almost five intervals and OFF in only one interval, providing a charging current path to charge the battery for the upcoming mode transitions (As shown in Fig. 15.e and 15.h). It is to be noted that, switch $\:{\varvec{S}}_{5}$ is ON for three intervals and OFF for three intervals catering a 0.5 dutycycle, such that the coupled inductor discharge currents are capable to deliver the required load current as shown in Fig. 15.c and 15.f.

Fig. 15

Steady state experimental waveforms in DIDO mode.

As like the coupled inductor, the output shunt capacitor plays a vital role in supplying the load during the discharge period. The charging and discharging voltage-current waveforms of the output capacitor is shown in Fig. 15.i. The ZCS and ZVS of the diode with respect to the coupled inductor is similar to that of the TISO mode, however, a small variation in the PIV is present. That is, the DIDO mode presents lesser inverse voltage when compared to the TISO mode, which is clearly illustrated in Fig. 15.g. The transition of mode between the TISO and DIDO is extensively analyzed by load transient giving rise to the discussion of case studies as discussed in the earlier section (Section III).

The load patterns are changed in a sequence viz., 200 Watts, 500 Watts, 600 Watts, 200 Watts and 500 Watts as shown in Fig. 16.d and 16.e. The current waveform during load change is captured in two images such that the transition of mode is clearly observed. Initially, the converter supply 200 Watts load and it is provided by the SPV array without the support of battery. When the load increases to 500 watts and 600 Watts consecutively, the controller senses and executes the SAS logic and switches to TISO mode. The battery discharges and supports the SPV voltage and increase the source voltage such that the demand is met. Likewise, the load is reduced abruptly back to 200 Watts and it is obvious that the controller switch back to DIDO mode and the battery starts to charge. Switches $\:{\:\varvec{S}}_{2}$ and $\:{\:\varvec{S}}_{4}$ are responsible for the mode switching and their pattern and duty cycle adjustments are represented in Fig. 16.f. The converter is validated for its transient analysis for the battery current by switching the load with a step signal to which the load is switched from 2.4 A to 4.8 A. At this load transition, the mode switching takes place resulting in DIDO to TISO mode transition. The battery current of 1.85 A is delivered to support the load and it is clearly pictured in Fig. 16.a. Also, the output voltage regulation during the load transient is also a key parameter (i.e.) the load volage regulation. It is to be noted that, the output voltage remains constant 110 V as shown in Fig. 16.b. Similarly, the coupled inductor current during the transients are delineated clearly in Fig. 16.a and 16.b showing the switching of inductor current between the charging and discharging as controlled by the respective switches. Finally, the diode switching during the load transients, when the switches are commutated at ZVS is shown in Fig. 16. c. It is observed that the diode peaks to 3.8 A gradually and drops to zero for the corresponding next interval. Figure 16.g and 16.h shows the hardware experimental setup showcasing the workstation and developed CI-FP-MPC. The developed CI-FP-MPC is validated for different power ratings from the SPV by contrived partial shading on the panels and tested the efficacy of the converter. It is observed that the converter operates in ample efficiency with respect to the source availability and with the usage of the battery. The proposed converter is compared with existing MPC topologies and contrasted in Table 2 for better correlation.

Fig. 16

Load transient waveforms and photograph of the experimental setup.

Performance comparison

Fig. 17

Measured efficiency curves with PV power.

The proposed converter is compared with existing MPC’s on various parameters as contrasted in Table 2. It is observed that most of the existing topologies have initiated the usage of coupled inductor as it provides good improvement in reduced stress and increased voltage gain. Another added advantage is the converter is operating in reduced switching frequency, which means the stress on the switches and diodes during commutation is highly reduced. Furthermore, the converter supplies a demand of 750 Watts with bidirectional power flow between the battery and load enhance the robustness of the control strategy with enhanced efficiency of 90–93% as shown in Fig. 17, which is an immediate requirement of the power electronic industries. The efficiency of²⁰ is 93.2% at the peak load power of 93 Watts²⁴, is 95.5% at 116.4 Watts²⁷, is 89.8% when power flows from battery to load at the rate of 40 Watts²⁸, is 94% operating at 125 Watts and²⁹ is 92% operating at 200 Watts. On comparing the efficiency with above literatures, it is observed that, the developed CI-FP-MPC delivers 93.5% efficiency operating at 750 watts. As the developed CI-FP-MPC takes two different solar panels with different voltage levels, both in array and individual panels, this converter is mainly used in the application of multiport-multisource environment, integration of two different solar panels and domestically employed solar house applications.

Table 2 Comparative analysis of proposed converter with existing MPC’s

Conclusion

This research article represented the topological synthesis and development of a four-port converter for multi-input renewable application. The developed converter is capable of operating in TISO and DIDO mode depending on the availability of PV source and SoC of the battery as well. Notably, the reduced number of discrete components added up with coupled inductor contributes an enhanced efficiency when it is operated in 500 Watts to 750 Watts demand. When compared to converters compared in the literature, the developed converter has only one capacitor shunted with the load which helps proper charge balance in the circuit. The converter capability with an enhanced efficiency of 93% is an addon feature of the proposed converter. Also, the reduced switching frequency of 20 kHz reduces the switching stress, however, the size of the inductor has to be compromised. Nevertheless, high power operation of the converter requires higher current rating, hence the trade-off between the size and power rating is adjusted. Another important contribution of this article is the development of autonomous sensing and control logic, which gathers the information about source availability and demand requirement and selects the appropriate mode of operation. Also, the mode transition during the load transients is fostered with soft switching for switches and diodes providing a smooth commutation. Finally, the effectiveness of the CI-FP-MPC is verified and validated experimentally with justifying results and demonstrated its robustness. In the developed CI-FP-MPC, the coupled inductor used is to enhance the load current capability when it is integrated with solar panels, however, the size of the coupled inductor and the EMI caused has to be considered as the future scope of this research.