Fig. 10
Structure diagram of anti-latch-up: (a) NMOS transistor surrounded with a \(P^+\) active region, (b) PMOS transistor surrounded with an \(N^+\) active region.
Fig. 10 | Scientific Reports
Structure diagram of anti-latch-up: (a) NMOS transistor surrounded with a \(P^+\) active region, (b) PMOS transistor surrounded with an \(N^+\) active region.
