Fig. 11
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits
Simulation results for SQNOR gates at different VDD (a) Pavg, (b) Tpd, (c) PDP, and (d) EDP.
Fig. 11 | Scientific Reports
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits
Simulation results for SQNOR gates at different VDD (a) Pavg, (b) Tpd, (c) PDP, and (d) EDP.
