Fig. 12
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits

Noise margin calculation (a) Typical VTC curve of a quaternary inverter, (b) Visual demonstration for quaternary NM.
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits
Noise margin calculation (a) Typical VTC curve of a quaternary inverter, (b) Visual demonstration for quaternary NM.