Fig. 16
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits

Effect of variation in number of CNTs for proposed quaternary logic gates in terms of (a) Pavg, (b) PDP.
From: Energy-efficient design of CNTFET-based quaternary arithmetic circuits
Effect of variation in number of CNTs for proposed quaternary logic gates in terms of (a) Pavg, (b) PDP.