Abstract
The development of quantum computers will require the careful management of the noise effects associated with qubit performance. However, the decoders responsible for diagnosing noise-induced computational errors must use resources efficiently to enable scaling to large qubit counts and cryogenic operation. They must also operate at speed, to avoid an exponential slowdown in the logical clock rate of the quantum computer. To overcome these challenges, we introduce the Collision Clustering decoder and demonstrate its implementation on field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC) hardware. We simulate logical memory experiments using the leading quantum error correction scheme (the surface code) and demonstrate megahertz decoding speed—matching the requirements of fast-operating modalities such as superconducting qubits—up to an 881 qubit surface code with the FPGA and 1,057 qubit surface code with the ASIC. The ASIC design occupies 0.06 mm2 and consumes only 8 mW of power.
This is a preview of subscription content, access via your institution
Access options
Access Nature and 54 other Nature Portfolio journals
Get Nature+, our best-value online-access subscription
$32.99 / 30 days
cancel any time
Subscribe to this journal
Receive 12 digital issues and online access to articles
$119.00 per year
only $9.92 per issue
Buy this article
- Purchase on SpringerLink
- Instant access to full article PDF
Prices may be subject to local taxes which are calculated during checkout
Similar content being viewed by others
Data availability
The stim32 circuits used to generate the samples and raw data from all the plots in this study are available via Zenodo at https://doi.org/10.5281/zenodo.11621877 (ref. 33).
References
Shor, P. Fault-tolerant quantum computation. In Proc. 37th Conference on Foundations of Computer Science 56–65 (IEEE, 1996).
Aharonov, D. & Ben-Or, M. Fault-tolerant quantum computation with constant error. In Proc. 29th Annual ACM Symposium on Theory of Computing, STOC ’97 176–188 (ACM, 1997).
Kitaev, A. Y. in Quantum Communication, Computing, and Measurement (eds Hirota, O. et al.) 181–188 (Springer, 1997).
Knill, E. Quantum computing with realistically noisy devices. Nature 434, 39–44 (2005).
Terhal, B. M. Quantum error correction for quantum memories. Rev. Mod. Phys. 87, 307 (2015).
Skoric, L., Browne, D. E., Barnes, K. M., Gillespie, N. I. & Campbell, E. T. Parallel window decoding enables scalable fault tolerant quantum computation. Nat. Commun. 14, 7040 (2023).
Higgott, O. & Gidney, C. Sparse blossom: correcting a million errors per core second with minimum-weight matching. Preprint at https://arxiv.org/abs/2303.15933 (2023).
Higgott, O., Bohdanowicz, T. C., Kubica, A., Flammia, S. T. & Campbell, E. T. Improved decoding of circuit noise and fragile boundaries of tailored surface codes. Phys. Rev. X 13, 031007 (2023).
Wu, Y. & Zhong, L. Fusion blossom: fast decoders for QEC. In Proc. IEEE International Conference on Quantum Computing and Engineering (QCE 2023) 928–938 (IEEE, 2023).
Google Quantum AI. Suppressing quantum errors by scaling a surface code logical qubit. Nature 614, 676–681 (2023).
Ferreira Marques, J. et al. Logical-qubit operations in an error-detecting surface code. Nat. Phys. 18, 80–86 (2021).
Krinner, S. et al. Realizing repeated quantum error correction in a distance-three surface code. Nature 605, 669–674 (2022).
Postler, L. et al. Demonstration of fault-tolerant universal quantum gate operations. Nature 605, 675–680 (2022).
Litinski, D. A game of surface codes: large-scale quantum computing with lattice surgery. Quantum 3, 128 (2019).
Ryan-Anderson, C. et al. Realization of real-time fault-tolerant quantum error correction. Phys. Rev. X 11, 041058 (2021).
da Silva, M. P. et al. Demonstration of logical qubits and repeated error correction with better-than-physical error rates. Preprint at https://arxiv.org/abs/arXiv:2404.02280 (2024).
Das, P., Locharla, A. & Jones, C. Lilliput: a lightweight low-latency lookup-table decoder for near-term quantum error correction. In Proc. 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS ’22 541–553 (ACM, 2022).
Liyanage, N., Wu, Y., Deters, A. & Zhong, L. Scalable quantum error correction for surface codes using FPGA. Preprint at https://arxiv.org/abs/2301.08419 (2023).
Overwater, R. J., Babaie, M. & Sebastiano, F. Neural-network decoders for quantum error correction using surface codes: a space exploration of the hardware cost-performance tradeoffs. IEEE Trans. Quantum Eng. 3, 3101719 (2022).
Ristè, D. et al. Real-time processing of stabilizer measurements in a bit-flip code. npj Quantum Inform. 6, 71 (2020).
Das, P. et al. AFS: accurate, fast, and scalable error-decoding for fault-tolerant quantum computers. In Proc. 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA) 259–273 (IEEE, 2022).
Charbon, E. et al. Cryo-CMOS for quantum computing. In Proc. 2016 IEEE International Electron Devices Meeting (IEDM) 13.5.1–13.5.4 (IEEE, 2016).
Xilinx. Ultrascale+ Product Brief https://www.amd.com/content/dam/amd/en/documents/products/adaptive-socs-and-fpgas/fpga/ultrascale-plus/virtex-ultrascale-product-brief.pdf
Synopsys. Fusion Compiler Datasheet http://www.synopsys.com/implementation-and-signoff/physical-implementation/fusion-compiler.html (2018).
Delfosse, N. & Nickerson, N. H. Almost-linear time decoding algorithm for topological codes. Quantum 5, 595 (2021).
Fowler, A. G., Stephens, A. M. & Groszkowski, P. High-threshold universal quantum computation on the surface code. Phys. Rev. A 80, 052312 (2009).
Frank, D. J. et al. A cryo-CMOS low-power semi-autonomous qubit state controller in 14 nm finFET technology. In Proc. 2022 IEEE International Solid-State Circuits Conference (ISSCC) Vol. 65 (360–362) (IEEE, 2022).
Bardin, J. C. et al. Design and characterization of a 28-nm bulk-CMOS cryogenic quantum controller dissipating less than 2 mW at 3 K. IEEE J. Solid-State Circuits 54, 3043–3060 (2019).
Pauka, S. J. et al. A cryogenic CMOS chip for generating control signals for multiple qubits. Nat. Electron. 4, 64 (2021).
Krinner, S. et al. Engineering cryogenic setups for 100-qubit scale superconducting circuit systems. EPJ Quantum Technol. 6, 2 (2019).
Dennis, E., Kitaev, A., Landahl, A. & Preskill, J. Topological quantum memory. J. Math. Phys. 43, 4452 (2002).
Gidney, C. Stim: a fast stabilizer circuit simulator. Quantum 5, 497 (2021).
Ben, B. et al. Data supporting ‘A real-time, scalable, fast and resource-efficient decoder for a quantum computer’. Zenodo https://doi.org/10.5281/zenodo.11621877 (2023).
Acknowledgements
We thank S. Brierley and J. Taylor for encouraging this research and related discussions. We also thank M. Maragkou and L. Martiradonna for feedback on the manuscript.
Author information
Authors and Affiliations
Contributions
K.M.B., N.I.G., K.J. and L.S. led the direction of the project with E.T.C. and B.B. providing guidance and advice. K.M.B., K.J. and L.S. developed the algorithm. K.M.B., K.J., A.W.R., L.S., M.L.T. and A.B.Z. developed software tools necessary to model the algorithm and its implementation on hardware. K.J. led T.B., O.B., R.R. and C.T. with the development of the hardware implementation of the decoder on the FPGA and ASIC, and the collection of the resulting data. L.S. analysed the data for both the hardware decoder and software models. K.M.B., T.B., N.I.G., K.J. and L.S. wrote an initial draft of the article. N.I.G. and L.S. wrote the final version of the article.
Corresponding authors
Ethics declarations
Competing interests
The authors declare no competing interests.
Peer review
Peer review information
Nature Electronics thanks Blake Johnson and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.
Additional information
Publisher’s note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Supplementary information
Supplementary Information
Supplementary Figs. 1–3 and Discussion.
Rights and permissions
Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.
About this article
Cite this article
Barber, B., Barnes, K.M., Bialas, T. et al. A real-time, scalable, fast and resource-efficient decoder for a quantum computer. Nat Electron 8, 84–91 (2025). https://doi.org/10.1038/s41928-024-01319-5
Received:
Accepted:
Published:
Issue date:
DOI: https://doi.org/10.1038/s41928-024-01319-5
This article is cited by
-
An effective lossless compression method for attitude data with implementation on FPGA
Scientific Reports (2025)
