A recurring theme of the December issues of Nature Electronics is the IEEE International Electron Devices Meeting (IEDM). This year is no different, as we return again to the IEDM, which is now in its 70th edition, and offer our highlights of the 2024 event. As usual, we cover a range of work from across academia and industry, and involving both conventional and emerging electronic materials. We start on the emerging materials side.

The field of graphene electronics is now 20 years old1. But before graphene, and other two-dimensional materials, there were carbon nanotubes. Although the spotlight has shifted, advances continue to be made with carbon nanotube electronics and the development of both high-performance and thin-film transistors.

At IEDM 2024, Lian-Mao Peng, Zhiyong Zhang and colleagues report an approach to create field-effect transistors that are based on aligned carbon nanotubes and can have a transconductance as high as 3.7 mS μm–1. The researchers — who are based at Peking University, Zhejiang University and the University of Electronic Science and Technology of China — use, in particular, a directly grown gate dielectric that can conformably coat the nanotube arrays.

As Aaron Franklin of Duke University explains in a News & Views article about the work, the key challenges in developing nanotube transistors for high-performance computing are purification, placement, passivation and production readiness. Peng, Zhang and colleagues do not examine the production readiness of their approach and process, but as Franklin notes, the work is “an impressive display of what is possible when the challenges of purity, placement and passivation of nanotubes are addressed.”

Also at IEDM 2024, but working with more conventional materials, Sheng-Shian Li and colleagues at National Tsing Hua University in Taiwan and the University of California at Berkeley report a monolithic integration technique that can create microelectromechanical system (MEMS) ultrasound transducers using complementary metal–oxide–semiconductor (CMOS) back-end-of-line (BEOL) capacitors. The work, which could be of use in advanced ultrasonic sensing and imaging applications, is discussed in a News & Views article by Chaerin Oh and Hyunjoo Lee of the Korea Advanced Institute of Science & Technology.

The theme of this year’s IEDM is shaping tomorrow’s semiconductor technology, and the steps the industry chooses to take in order to continue device scaling will inevitably be central to this. Back in the early 2010s, fin field-effect transistor structures were introduced, and recently the industry has transitioned to gate-all-around structures. A potential next step is a monolithic complementary field-effect transistor device architecture in which n-type and p-type transistors are vertically stacked.

At IEDM 2024, Sandy Liao and colleagues from the Taiwan Semiconductor Manufacturing Company (TSMC) report developments in the fabrication processes of such monolithic complementary transistors. As Xiong Xiong and Yanqing Wu of Peking University explain in a News & Views article about the work, “the TSMC team addressed three critical process challenges: threshold voltage tuning, vertical metallized drain local interconnects and back-side gate contacts”. These advances allow Liao and colleagues to fabricate inverters with a 48 nm gate pitch.

Elsewhere, we highlight reports on the latest gate-all-around CMOS technologies from TSMC and from Intel. We highlight work on integrating liquid-crystal-based spatial light modulators with CMOS image sensors, and work on fabricating a reliable 4 Mb embedded resistive random-access memory on a 28 nm node CMOS platform. Finally, we highlight advances in thermal models for integrated circuit design and advances in bionic compound eyes with wide fields-of-view.