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An integrated microwave neural network for broadband computation and communication

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Abstract

The development of high-bandwidth applications, including multi-gigabit communication and radar imaging, demands faster processing. However, in the microwave regime, where frequencies exceed clock rates, sampling and computation become challenging. Here we report an integrated microwave neural network for broadband computation and communication. Our microwave neural network operates across tens of gigahertz but is reprogrammed with slow megabits per second control bitstreams. By exploiting strong nonlinearity in coupled microwave oscillations, it expresses its computation in a narrower spectrum, enabling easy read-out. The system searches bit sequences in multi-gigabits per second data and emulates digital functions without custom circuits. It accelerates radio-frequency machine learning by classifying encoding schemes and detecting frequency shifts to track flight trajectories from radar. The microwave neural network is fabricated with standard complementary metal–oxide–semiconductor technology. It occupies a sub-wavelength footprint of 0.088 mm2 on chip and has a sub-200-mW power consumption, supporting integration in a general-purpose analogue processor.

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Fig. 1: Solution to ultrawideband computation and communication signal processing problems.
Fig. 2: Distributed microwave oscillatory modes form an ultrabroadband neural network.
Fig. 3: Evolution of the integrated MNN’s frequency response to broadband microwave signals and parametric drives.
Fig. 4: CMOS-integrated MNN mimics an ultrahigh-speed digital computer without the need for a clock.
Fig. 5: Simplified radar signal processing and communication decoding through the integrated MNN.

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Data availability

The measured spectral data used for backend training in digital emulation and radar tracking tasks are available via Zenodo at https://zenodo.org/records/14188849 (ref. 51).

Code availability

Code for backend training, radar flight scenario simulation and coupled-mode-theory-based numerical simulations that support the conclusions in this article are available via Zenodo at https://doi.org/10.5281/zenodo.14188849 (ref. 51).

Change history

  • 19 August 2025

    In the version of this article initially published online, the equal contributors footnote for Bala Govind and Maxwell G. Anderson was missing and now appears in the HTML and PDF versions of the article.

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Acknowledgements

B.G. and A.A. acknowledge GlobalFoundries and the Defense Advanced Research Projects Agency (DARPA), through its Wideband Adaptive RF Protection (WARP) program, for providing the chip fabrication facility. B.G. and A.A. also thank the Cornell NanoScale Facility, a member of the National Nanotechnology Coordinated Infrastructure (NNCI), which is supported by the National Science Foundation (grant no. NNCI-2025233) and where the work was done in part. M.G.A. and P.L.M. additionally acknowledge funding from the National Science Foundation (award no. CBET-2123862). F.O.W. acknowledges support from the Eric and Wendy Schmidt AI in Science Postdoctoral Fellowship, a program of Schmidt Sciences, LLC. We thank A. Aksaray, S. Huang, T. Tapen, F. Monticone, A. Senanian, S. Prabhu and V. Krementski for useful discussions.

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Authors and Affiliations

Authors

Contributions

B.G. conceived the structure of the integrated microwave neural network, designed the CMOS chips and set up the experiment. M.G.A. automated the experiment and performed the machine learning. B.G. and F.O.W. formulated the coupled model of the parametrically driven oscillators, with F.O.W. producing the numerical results. A.A. supervised the design of the chips and the experiment. P.L.M. supervised the machine learning. B.G. wrote the paper and produced the figures, with input from all authors.

Corresponding author

Correspondence to Bala Govind.

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Competing interests

The authors have filed a provisional US patent application (no. 63/742,208) based on the neural processor presented in this article.

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Nature Electronics thanks Bowei Dong, Xingjun Wang and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Extended data

Extended Data Fig. 1 Structure of the distributed nonlinear waveguide resonator.

a, The nonlinear transmission line comprises cascaded π sections of fixed inductive waveguide segments and drive-sensitive nonlinear capacitors. Each resonance absorbs part of the incoming microwave signal and transmits the rest to subsequent segments. The overall nonlinear response results from cumulative reflections back to the RFin port. b, Top view of the layout of the nonlinear waveguide. Nonlinear capacitors are inserted periodically along the pretzel-shaped trace. Their nominal bias points are set through analog voltages. c, In the Silicon-on-Insulator process used here, a single polynomial nonlinear capacitor consists of two pairs of antiparallel diodes. c.i, Compact layout of this component. c.ii, The schematic, wherein the diode pairs are biased at their mid-point. c.iii, SPICE / Spectre-model simulated characterization of the nonlinear capacitor across variation in bias voltages and input RF power shows that by injecting a constant RF input power of -10 dBm, the effective capacitance decreases with increasing bias voltage. c.iv, The effective capacitance is highly sensitive to the input RF drive’s power. The capacitance reduces with increasing field strength. c.v, The same nonlinearity, when considering its variance for different frequencies. Here, the capacitance varies with RF voltage as \({{\rm{C}}}_{{\rm{eff}}}({{\rm{V}}}_{{\rm{NL}}},{{\rm{V}}}_{{\rm{in}}})={\rm{a}}-{\rm{b}}{{\rm{V}}}_{{\rm{in}}}+{\rm{c}}{{{\rm{V}}}_{{\rm{in}}}}^{2}-{\rm{d}}{{{\rm{V}}}_{{\rm{in}}}}^{3}+\ldots {\rm{fF}}\) which is well-suited to generating expansive functions for a neural pre-processor.

Extended Data Fig. 2 Structure of the distributed linear waveguide.

a, Top view of the each tunable linear waveguide (B, C and D) that produces linear modes. Switches S1,2….6 are inserted periodically along the length of the transmission line and make it tunable in length, with subsegments TLine1,2…6. Shorting the line through these switches alters the effective length of the waveguide to support different fundamental frequencies. b, Cross-section of RF-optimized and digital metal layers in the 45 nm Silicon-on-Insulator CMOS metal stack. Here, the top three layers are via’ed together for low-loss transmission. The five metal layers below are used for routing control signals from a Serial-to-Parallel Interface, to the switches, and also via’ed together to form a low-loss return path to the power supply. c, A schematic of the linear waveguide resonators, with options to lengthen or shorten the return path of the microwave signal. In the experiments, however, for simplicity, only the shortest path (configuration with all switches turned on) was used for training in the machine learning tasks.

Extended Data Fig. 3 Reduction of the CMOS Microwave Neural Network circuit to a generalized coupled mode model.

a, The integrated microwave neural network consists of interconnected linear and nonlinear resonators. The linear resonator is designed as a single waveguide with an adjustable length, implemented through a cascade of sub-segments, each referred to as Lin. These sub-segments can be grounded via switches (S1, S2, S3, S4 and S5), which immediately terminate the microwave signal’s return path at the first switch that is shorted to ground. In contrast, the nonlinear resonator features a transmission line loaded with polynomially nonlinear capacitors. These capacitors form C-L-C π sections that are coupled by delays. Microwave power from input pads is distributed to these resonators through symmetrically arranged couplers (whose equivalent circuits are marked in purple). The left coupler divides power into two linear waveguides, while the right coupler feeds into a linear waveguide and into a nonlinear waveguide. Saturable gain elements, implemented as cross-coupled transistor pairs, connect the waveguides on opposite sides of the circuit, compensating for losses within the electromagnetic structures. Additionally, a pair of capacitor banks provides a small degree of tunability to the modes supported by the waveguides. Critically, there is parametric coupling between the circuit’s upper and lower halves through a pair of slow bitstream-driven switches. b, To simplify the complex circuit, we recognize that since the linear resonators support only a single natural frequency, they can be represented as tank circuits composed of Lj, and Cj. The symmetry in the bottom half of the circuit allows us to approximate the capacitor banks as two evenly split capacitors, contributing to the overall capacitance of the tank circuits. However, the asymmetry in the configuration of the resonators in the upper half does not permit such a simplification. c, To focus on the primary mechanism by which the system’s sensitivity to incoming signals is enhanced, we can largely ignore the left half of the circuit and concentrate on the interaction between the nonlinear distributed resonances and the linear resonator on the right half. These components interact only through the inductive path via a coupler and a coupling capacitor between the turns of the coupler. The source of regenerative gain through the cross-coupled pair is retained. For ease of analysis, we represent the parametrically driven switch as a tunable capacitor, which can be toggled between a very small value (open circuit) and a very large value (short circuit). d, The reduced circuit can be represented as an ensemble of coupled modes–a cascade of nonlinear resonators connected to a linear resonator via a parametrically varied switched coupling and a fixed phase delay (through the coupler). These modes interact with the incoming drive (fast Gigabit/sec microwave-speed data), with internal losses being compensated by saturable gain.

Extended Data Fig. 4 Effects of initial conditions and drive-detuning on spectral response and time evolution in the Microwave Neural Network, without parametric switch coupling.

a, The integrated circuit in the main Article is reduced to a coupled-mode model. This comprises a cascade of nonlinear resonances (waveguide A) coupled both passively and through parametric switching to a linear resonance. The power spectrum and Poincaré map of modes represented by the first nonlinear resonator (vNL,1) are observed. b, The MNN is driven with an external signal at 0.5ωNL,1. For a first set of initial conditions imposed on individual resonators’ responses, there exists a regime in which (b.i), pure harmonic oscillation is seen and, (b.ii), for another set of initial conditions, comb-like behavior is produced. These correspond to situations where the Poincaré map shows sparse and organized points. This suggests a quasi-stable dynamic state (b.iii), and another where the two islands reflect more unstable, dynamic responses (b.iv), indicating locally chaotic solutions. c, If, instead, the drive was fed to the MNN at 0.65ωNL,1, different working regimes are triggered by different initial conditions. True comb-like behavior (c.i), can be produced, as evidenced by isolated, longer-memory, coherent solutions on the Poincaré map (c.ii). In another instance, divergent chaotic behavior shown by dense, scattered points (indicative of chaotic dynamics) (c.iv) manifests itself by a less structured spectrum emitted by the nonlinear resonator(s) (c.iii). For all simulations, nonlinear coupling coefficients, gain and decay rates are normalized with respect to ωNL,1. Here, βi,i+1 = 0.02 and \({{{\boldsymbol{\gamma }}}_{{\bf{i}}}}^{{\bf{int}}}=0.03\), with i = 1, 2…7 and G equals 0.2. Since parametric coupling is absent, βpar = 0.

Extended Data Fig. 5 Manipulation of the comb-like spectra emitted by the Microwave Neural Network, with microwave-speed signals and slow parametric bitstreams.

In experiments involving Gigabit/sec data and radar returns, the accessible phase space of MNN is constrained by the configurations of incoming drive signals and the parametric bitstreams applied on the switch between the first non-linear mode and a linear mode (a). As a result, the output spectrum is shaped by the constrained, unstable nonlinear dynamics of the system, indicating extreme sensitivity to the modulation of GHz-speed microwave data (1-20 GHz) by slow MHz-speed parameters. For Drive 1, the Poincaré map for slow parameter bitstreams 1 and 2 shows clustered points with a few points that are more spread out (b.iv and b.v), suggesting quasi-periodic dynamics while Bitstream 3 gives tightly clustered points (b.vi), indicating stable, periodic behavior. For Drive 2, under action of all three parametric bitstreams, the formation of ring-like structures indicates quasi-periodic behavior with non-linear dynamics (c.iv, c.v and c.vi). Finally, under Drive 3, bitstreams 1 and 2 induce a combination of ring-like patterns in the Poincaré maps (d.iv and d.v), revealing a tendency towards chaotic behavior, while Bitstream 3 exhibits multiple, structured rings (d.vi), indicating quasi-periodic behavior with complex and unstable dynamics. For all simulations, nonlinear coupling coefficients, gain and decay rates are normalized with respect to ωNL,1. Here, βi,i+1 = 0.02 and \({{{\boldsymbol{\gamma }}}_{{\bf{i}}}}^{{\bf{int}}}=0.03\), with i = 1, 2…7 and G equals 0.2.

Extended Data Fig. 6 Experimental setup to record the microwave neural network’s response to microwave-speed digital bitstreams.

The CMOS microwave neuron chip is wire-bonded to a Printed Circuit Board, which connects it to external power supplies and bias voltages for the oscillators’ core, logic and drivers and Kerr-capacitors’ bias. a, A low-speed bit pattern (clocked under 200 MHz) drives switches that establish parametric coupling between oscillators, imparting a shape to the microwave comb neuron. A first pair of probes, forming a Ground-Signal-Ground-Signal-Ground (GSGSG) configuration cyclically transfer high bandwidth 0-12 gigabits per second bitstreams into the chip to interact with the comb. The resulting microwave computations are manifested as steady-state responses in the frequency domain and produce new combs, each unique to the combination of inputs, that is, the fast input bitstreams and slow parameter bitstreams. Output spectra from two ports are read off spectrum analyzers in a small band between 10 and 14 gigahertz, through a second pair of probes and Ground-Signal-Ground-Signal-Ground waveguides. b, The probe-station assembly consists of the CMOS die attached to a breakout PCB, interfaced with millimeter wave probes for input and output data. It also includes a low-speed BNC cable interface for feeding in the parametric bitstream drive.

Extended Data Fig. 7 Measured frequency-comb-like spectra generated by the coupled nonlinear and linear resonators.

a, The supply voltage on the saturable gain element alters the transconductance of the cross-coupled pair’s transistors and, thereby, the stability of the comb. It has a nominal value of 0.5 V, below which it collapses. b, The polynomial nonlinearity is tuned using bias voltages that set the sensitivity of the transmission line’s capacitances to incoming microwaves. c, The initial profile of the 12.5 GHz comb can be altered by feeding parameters through a 32-bit sequence, run cyclically at slow speeds under 150 MHz. This parameterized comb is exposed to incoming drive signals and performs computation on them.

Extended Data Fig. 8 Characterization of the comb generated by coupling nonlinear modes on chip.

a, Under nominal biasing conditions (power supply of 0.6 V and VNL = 0.6 V) and without the influence of parametric bits and incoming microwave signals, the measured undisturbed frequency comb is centered at 12.47 GHz and has a constant line spacing of 80 MHz. b, The phase noise is measured for various offsets from the central component. While this version of the chip has slightly higher close-in phase noise than conventional CMOS oscillators, microwave neurons built from this modality are stable and highly input sensitive to drive signals.

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Govind, B., Anderson, M.G., Wu, F.O. et al. An integrated microwave neural network for broadband computation and communication. Nat Electron 8, 738–750 (2025). https://doi.org/10.1038/s41928-025-01422-1

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