Extended Data Fig. 2: Parallel design data flow block diagram. | Nature Electronics

Extended Data Fig. 2: Parallel design data flow block diagram.

From: An integrated-circuit-based probabilistic computer that uses voltage-controlled magnetic tunnel junctions as its entropy source

Extended Data Fig. 2

Data flow block diagram of a probabilistic Ising machine (PIM) with parallel updates of 5 p-bit groups, corresponding to the best possible colouring of the graph. As with the serially updating version, the input equation for each probabilistic bit (p-bit) is calculated as its h value added to a J-vector scaled sum of other p-bit values. In contrast to the serially updating version, a probabilistic logic unit (PLU) exists for every collection of at most 5 p-bits, with a p-bit of each group assigned to every PLU. If a completely even distribution is impossible, then a small number of PLUs will have less than 5 p-bits assigned and consequently be inactive for the missing p-bit group’s clock cycle.

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