Extended Data Fig. 3: Experimental and measurement platform for evaluating the nvDCIM chips. | Nature Electronics

Extended Data Fig. 3: Experimental and measurement platform for evaluating the nvDCIM chips.

From: A lossless and fully parallel spintronic compute-in-memory macro for artificial intelligence chips

Extended Data Fig. 3

(a) The experimental platform consists of an nvDCIM test chip, a PCB test board, and a National Instruments (NI) PXIe system, including the PXIe-6570 and PXIe-8881 modules, which handle chip control, intermediate data processing, and result visualization. Additionally, two source/measurement units (SMUs) are included in the platform for power measurements. (b) A flowchart illustrating the inference process conducted on the experimental platform. During the execution, the 64-kb nvDCIM macro performs parallel and lossless MVM operations across 4-, 8-, 12-, and 16-bit precisions for convolutional and fully connected layers. Input vectors and matrix data are supplied to the nvDCIM macro via the NI PXIe-6570 controlled through LabVIEW, which also retrieves the MVM results. Beyond this, the PXIe-6570 implements ReLU activations, pooling, Tanh activations, and batch normalization. The PXIe-8881 processes and displays the final inference results. The system supports a range of computational tasks, such as low computational precision tasks (for example, image classification with CNNs) and high computational precision tasks (for example, flow field reconstruction using PINNs).

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