Fig. 1: Accelerated technology computer-aided design (TCAD) device simulation.

a Simulation time versus the number of points for various device structures. The newer the device architecture, the longer the computation time. b Conventional bias-ramping process. c Example of the convergence behavior depending on the bias-ramping step size in the transition from the off-current to the on-current condition. As the step size increases, convergence may not be guaranteed. d Example of the normalized error versus Newton iterations at each bias step when solving the drift-diffusion model, starting from equilibrium to the target bias condition. Each bias step involves several iterations, during which convergence or failure may occur, eventually leading to the target voltage. e Concept of an accelerated TCAD simulation without time-consuming bias-ramping process.