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Transistors on a roll: 3D circuits built from stacks of flexible membranes

Stacks of transistors built from nanomembranes that can be rolled onto a substrate have been used to fabricate 3D circuits.
By
  1. Veeresh Deshpande

    1. Veeresh Deshpande is in the Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai 400076, India.

As the electronics industry approaches the physical limit of transistor miniaturization, there is an ongoing shift towards a ‘skyscraper’ model in which transistors are stacked in layers on a single chip. Many unconventional materials have been explored for these 3D circuits, but none can yet compete with silicon, which remains the industry standard for high-performance 2D chips. Writing in Nature, Lam et al.1 report the creation of 3D transistor circuits constructed from stacked silicon nanomembranes. These flexible membranes are peeled off a substrate and stacked onto to the chip using a roller — a simple process that does not require high temperatures but achieves the high silicon-crystal quality that integrated circuits require.

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Nature 654, 599-600 (2026)

doi: https://doi.org/10.1038/d41586-026-01413-y

References

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Competing Interests

The author declares no competing interests.

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