Fig. 2: Schematic diagram of patterned SOI trenches and design of edge coupler.
From: Monolithic integration of embedded III-V lasers on SOI
a Fabrication flows of patterned SOI template with 3 μm BOX layer and 220 nm top Si layer. b The layout and parameters of silicon fork coupler. c Electric field distribution of the edge coupler. d Schematic diagram of embedded laser process on trenched SOI. Step 1: The exposed silicon substrate patterned with silicon gratings. Step 2: Homoepitaxially formed Si V-groove structures over the top of silicon gratings. Step 3: InAs/GaAs QD laser epi-structures directly grown inside the SOI trench. Step 4: Chemical remove of unwanted III-V materials outside the SOI trench. Step 5: Fabricated narrow ridge laser with one-side as-cleaved facets. Step 6: Final embedded QD lasers with direct edge coupling into pre-patterned silicon waveguides
