Fig. 3: Fabrication and characterization of the PDONN chip. | Light: Science & Applications

Fig. 3: Fabrication and characterization of the PDONN chip.

From: Scaling up for end-to-end on-chip photonic neural network inference

Fig. 3: Fabrication and characterization of the PDONN chip.The alternative text for this image may have been generated using AI.

a Microscope image of the PDONN chip, showing the grating coupler (GC) array used for optical input and output coupling. Conv1/2 represents the 1st/2nd convolution layer, and FC1/2 represents the 1st/2nd fully connected layer. b The packaged PDONN chip with integrated optical and electrical interfaces. c Measured S21 parameter of the on-chip IM, showing a 3-dB bandwidth of 22 MHz. d Attenuation coefficient of the IM as a function of the injected current. e Delay measurements for the first nonlinear layer of the PDONN chip, along with the estimation of the final output signal. Dashed lines indicate fitted waveforms for better visualization. f Typical NAF utilized in the experiment, demonstrating its effectiveness. Dotted line denotes the transfer function with 0 dB net gain

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