Fig. 3: Device architecture and optoelectronic performance. | Light: Science & Applications

Fig. 3: Device architecture and optoelectronic performance.

From: 1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks

Fig. 3: Device architecture and optoelectronic performance.

a Schematic illustration and corresponding cross-sectional SEM image of the device, comprising n-type DBRs, a passive cavity, multiple quantum wells, an oxide layer, and p-type DBRs. Scale bar: 5 μm, 500 nm, 200 nm. b L-I-V-OPSR characteristics of the VCSEL measured at 85 °C. c L-I curves of the device measured at various temperatures ranging from 25 °C to 95 °C. d Emission spectra measured at different temperatures (25 °C to 95 °C) under a fixed injection current of 1.4 mA. The inset shows the wavelength shift (∆λ/∆T), exhibiting a linear redshift of 0.05 nm/°C with increasing ambient temperature

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