Fig. 1: Schematics of the perceptron model for the neurotransmission process and hardware implementation of ANNs. | NPG Asia Materials

Fig. 1: Schematics of the perceptron model for the neurotransmission process and hardware implementation of ANNs.

From: A self-rectifying TaOy/nanoporous TaOx memristor synaptic array for learning and energy-efficient neuromorphic systems

Fig. 1

a Three pre-neurons (yellow) and one post-neuron (green) are connected via individual synapses. The inset shows the simplified neurotransmission process. The input (xi) from the axon of each pre-neuron is scaled by its own wi value and sent to a dendrite of the post-neuron. In the cell body of the post-neuron, all scaled inputs are integrated (∑wixi). b Schematic of a 4 × 4 crossbar array consisting of synaptic devices for ANNs. The input voltages (xi, i = 1, 2, 3, and 4) are individually applied to the rows (pre-neurons) of the array (yellow lines), and the neural signals (∑wixi) are sent to a designated column line, i.e., the jth post-neurons (blue arrow). In contrast to the biological neurotransmission process, undesired neural signals (∑IUndesired) are also generated through the neighboring synaptic devices (red arrow) in the array without selectors, which means the output signal is given by ∑wixi + ∑IUndesired

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