Fig. 2: Implementing the QuAND gate on a high-scalability superconducting quantum processor.
From: Scalable algorithm simplification using quantum AND logic
a, False-colour micrograph of the device. Red and blue indicate the lower and higher fixed-frequency transmon qubits, respectively. b, Eigenenergies of states \({\left|{101}\right\rangle}\) and \({\left|{200}\right\rangle}\) (tri-mode notation) in a qubit–coupler–qubit subsystem versus the coupler-flux bias, Φe. The thin black line with the embedded arrowheads indicates the state trajectory for the iSWAP11−20 pulse sent to the coupler (inset), where Ap is the amplitude of the parametric drive on the flux pulse plateau. c, Measured final state probabilities in states \({\left|{11}\right\rangle}\) and \({\left|{20}\right\rangle}\) after the iSWAP11−20 pulse versus the parametric drive amplitude. The dashed line indicates a full iSWAP11−20 operation.
