Fig. 3: Low-depth synthesis of generalized Toffoli gates.
From: Scalable algorithm simplification using quantum AND logic
a, Schematic showing the compiled sequence for implementing the 4-qubit (left), 6-qubit (centre) and 8-qubit (right) CZ gate circuits described in Fig. 1b on the 8-qubit processor with qubits indexed from 0 to 7. The arrows denote the QuAND gate sequence, with time progressing from dark blue to light green. We have omitted the reverse QuAND sequence. b, Measured truth tables of the corresponding generalized Toffoli gate. In these examples, the controlled-NOT operation is performed on Q7 in all cases.
