Abstract
Since the invention of the first transistor based on germanium, a wide range of 3D semiconductors, metals and insulators have been used as building blocks for integrated logic and memory devices. However, the energy consumption of electronic devices based on these 3D materials has continued to increase, particularly in emerging paradigms such as artificial intelligence, raising concerns about the long-term sustainability of technological advancement. To overcome this limitation, incorporating atomically thin van der Waals materials into electronic devices has been proposed, as their unique structural, electronic and polymorphic properties could enable new mechanisms to enhance device energy efficiency. Here, we discuss fundamental challenges faced by conventional 3D-material-based electronics and present how van der Waals materials can be used to address these limitations for energy-efficient device architectures. We conclude by summarizing the key challenges that remain and outlining strategic directions to bridge the gap between fundamental materials science and practical device applications for sustainable, energy-efficient devices.
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References
Auweter, A., Bode, A., Brehm, M., Huber, H. & Kranzlmüller, D. in Information and Communication on Technology for the Fight Against Global Warming (eds Kranzlmüller, D. & Toja, A. M.) 18–25 (Springer, 2011).
Kelechi, A. H. et al. Artificial intelligence: an energy efficiency tool for enhanced high performance computing. Symmetry 12, 1029 (2020).
Ye, L. et al. The challenges and emerging technologies for low-power artificial intelligence IoT systems. IEEE Trans. Circuits Syst. I Regul. Pap. 68, 4821–4834 (2021).
Zhai, Y., Feng, Z., Zhou, Y. & Han, S.-T. Energy-efficient transistors: suppressing the subthreshold swing below the physical limit. Mater. Horiz. 8, 1601–1617 (2021).
Wong, H. S. P., Frank, D. J., Solomon, P. M., Wann, C. H. J. & Welser, J. J. Nanoscale CMOS. Proc. IEEE 87, 537–570 (1999).
Tseng, A. A., Kuan, C., Chen, C. D. & Ma, K. J. Electron beam lithography in nanoscale fabrication: recent development. IEEE Trans. Electron. Packag. Manuf. 26, 141–149 (2003).
Chen, Y. et al. Sub-10 nm fabrication: methods and applications. Int. J. Extreme Manuf. 3, 032002 (2021).
Ieong, M., Doris, B., Kedzierski, J., Rim, K. & Yang, M. Silicon device scaling to the sub-10-nm regime. Science 306, 2057–2060 (2004).
Zhibin, R. et al. Examination of hole mobility in ultra-thin body SOI MOSFETs. In Dig. Int. Electron Devices Meet. 51–54 (IEEE, 2002).
Cheng, I. C., Wagner, S. & Vallat-Sauvain, E. Contact resistance in nanocrystalline silicon thin-film transistors. IEEE Trans. Electron. Devices 55, 973–977 (2008).
Pesavento, P. V., Puntambekar, K. P., Frisbie, C. D., McKeen, J. C. & Ruden, P. P. Film and contact resistance in pentacene thin-film transistors: dependence on film thickness, electrode geometry, and correlation with hole mobility. J. Appl. Phys. 99, 094504 (2006).
Yan, R. H., Ourmazd, A. & Lee, K. F. Scaling the Si MOSFET: from bulk to SOI to bulk. IEEE Trans. Electron. Devices 39, 1704–1710 (1992).
Henson, W. K. et al. Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime. IEEE Trans. Electron. Devices 47, 1393–1400 (2000).
Geim, A. K. & Novoselov, K. S. The rise of graphene. Nat. Mater. 6, 183–191 (2007).
Zhang, K., Feng, Y., Wang, F., Yang, Z. & Wang, J. Two dimensional hexagonal boron nitride (2D-hBN): synthesis, properties and applications. J. Mater. Chem. C 5, 11992–12022 (2017).
Manzeli, S., Ovchinnikov, D., Pasquier, D., Yazyev, O. V. & Kis, A. 2D transition metal dichalcogenides. Nat. Rev. Mater. 2, 17033 (2017).
Kim, K. S. et al. The future of two-dimensional semiconductors beyond Moore’s law. Nat. Nanotechnol. 19, 895–906 (2024).
Liu, Y. et al. Promises and prospects of two-dimensional transistors. Nature 591, 43–53 (2021).
Liu, Y., Huang, Y. & Duan, X. Van der Waals integration before and beyond two-dimensional materials. Nature 567, 323–333 (2019).
Wu, R. et al. van der Waals epitaxial growth of atomically thin 2D metals on dangling-bond-free WSe2 and WS2. Adv. Funct. Mater. 29, 1806611 (2019).
Geim, A. K. & Grigorieva, I. V. Van der Waals heterostructures. Nature 499, 419–425 (2013).
Guo, H.-W., Hu, Z., Liu, Z.-B. & Tian, J.-G. Stacking of 2D materials. Adv. Funct. Mater. 31, 2007810 (2021).
Chen, H., Li, H., Ma, T., Han, S. & Zhao, Q. Biological function simulation in neuromorphic devices: from synapse and neuron to behavior. Sci. Technol. Adv. Mater. 24, 2183712 (2023).
Ji, Y. et al. Ultralow energy adaptive neuromorphic computing using reconfigurable zinc phosphorus trisulfide memristors. Nat. Commun. 16, 6899 (2025).
Li, Y. et al. Memristors with analogue switching and high on/off ratios using a van der Waals metallic cathode. Nat. Electron. 8, 36–45 (2025).
Yan, X. et al. Moiré synaptic transistor with room-temperature neuromorphic functionality. Nature 624, 551–556 (2023).
Calhoun, B. H. & Chandrakasan, A. Characterizing and modeling minimum energy operation for subthreshold circuits. In Proc. Int. Symp. Low Power Electron. Design 90–95 (ACM, 2004).
Truesdell, D. S., Ahmed, S. Z., Ghosh, A. W. & Calhoun, B. H. Minimum-energy digital computing with steep subthreshold swing tunnel FETs. IEEE J. Explor. Solid-State Comput. Devices Circuits 6, 138–145 (2020).
Calhoun, B. H., Wang, A. & Chandrakasan, A. Modeling and sizing for minimum energy operation in subthreshold circuits. IEEE J. Solid-State Circuits 40, 1778–1786 (2005).
Hueting, R. J. E., Hemert, T. V., Kaleli, B., Wolters, R. A. M. & Schmitz, J. On device architectures, subthreshold swing, and power consumption of the piezoelectric field-effect transistor (π-FET). IEEE J. Electron. Devices Soc. 3, 149–157 (2015).
Lee, T. & Schweitzer, E. O. Measuring and improving the switching capacity of metallic contacts. Presented at the 54th Annual Georgia Tech Protective Relaying Conference https://cdn.selinc.com/assets/Literature/Publications/Technical%20Papers/6098_MeasuringImproving_Web.pdf (2000).
Oh, G., Jeon, J. H., Kim, Y. C., Ahn, Y. H. & Park, B. H. Gate-tunable photodetector and ambipolar transistor implemented using a graphene/MoSe2 barristor. NPG Asia Mater. 13, 10 (2021).
Tian, M. et al. Boosting responsivity and speed in 2D material based vertical p-i-n photodiodes with excellent self-powered ability. Nat. Commun. 16, 5824 (2025).
Wu, F. et al. Vertical MoS2 transistors with sub-1-nm gate lengths. Nature 603, 259–264 (2022).
Zhao, D.-H. et al. Realizing an omega-shaped gate MoS2 field-effect transistor based on a SiO2/MoS2 core–shell heterostructure. ACS Appl. Mater. Interfaces 12, 14308–14314 (2020).
O’Brien, K. P. et al. Process integration and future outlook of 2D transistors. Nat. Commun. 14, 6400 (2023).
Das, S. et al. Transistors based on two-dimensional materials for future integrated circuits. Nat. Electron. 4, 786–799 (2021).
Kang, J.-H. et al. Monolithic 3D integration of 2D materials-based electronics towards ultimate edge computing solutions. Nat. Mater. 22, 1470–1477 (2023).
Kim, K. S. et al. Growth-based monolithic 3D integration of single-crystal 2D semiconductors. Nature 636, 615–621 (2024).
Kim, J. -y, Ju, X., Ang, K.-W. & Chi, D. Van der Waals layer transfer of 2D materials for monolithic 3D electronic system integration: review and outlook. ACS Nano 17, 1831–1844 (2023).
Lu, D. et al. Monolithic three-dimensional tier-by-tier integration via van der Waals lamination. Nature 630, 340–345 (2024).
Kim, H. et al. Van der Waals epitaxy and beyond for monolithic 3D integration. 2D Mater. 12, 022003 (2025).
Liu, Y., Stradins, P. & Wei, S.-H. Van der Waals metal–semiconductor junction: weak Fermi level pinning enables effective tuning of Schottky barrier. Sci. Adv. 2, e1600069 (2016).
Schulman, D. S., Arnold, A. J. & Das, S. Contact engineering for 2D materials and devices. Chem. Soc. Rev. 47, 3037–3058 (2018).
Ma, L., Wang, Y. & Liu, Y. Van der Waals contact for two-dimensional transition metal dichalcogenides. Chem. Rev. 124, 2583–2616 (2024).
Wang, Y. & Chhowalla, M. Making clean electrical contacts on 2D transition metal dichalcogenides. Nat. Rev. Phys. 4, 101–112 (2022).
Sun, L. et al. Ultralow switching voltage slope based on two-dimensional materials for integrated memory and neuromorphic applications. Nano Energy 69, 104472 (2020).
Yang, Q. et al. Steep-slope vertical-transport transistors built from sub-5 nm thin van der Waals heterostructures. Nat. Commun. 15, 1138 (2024).
Guo, J. et al. SnSe/MoS2 van der Waals heterostructure junction field-effect transistors with nearly ideal subthreshold slope. Adv. Mater. 31, 1902962 (2019).
Cassabois, G., Valvin, P. & Gil, B. Hexagonal boron nitride is an indirect bandgap semiconductor. Nat. Photon. 10, 262–266 (2016).
Vu, Q. A. et al. Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio. Nat. Commun. 7, 12725 (2016).
Sasaki, T. et al. Ultrafast operation of 2D heterostructured nonvolatile memory devices provided by the strong short-time dielectric breakdown strength of h-BN. ACS Appl. Mater. Interfaces 14, 25659–25669 (2022).
Liu, Y. et al. Van der Waals heterostructures and devices. Nat. Rev. Mater. 1, 16042 (2016).
Liu, L. et al. Ultrafast non-volatile flash memory based on van der Waals heterostructures. Nat. Nanotechnol. 16, 874–881 (2021).
Hu, W. & Yang, J. Two-dimensional van der Waals heterojunctions for functional materials and devices. J. Mater. Chem. C. 5, 12289–12297 (2017).
Chang, K. et al. Enhanced spontaneous polarization in ultrathin SnTe films with layered antipolar structure. Adv. Mater. 31, 1804428 (2019).
Kang, K. et al. High-mobility three-atom-thick semiconducting films with wafer-scale homogeneity. Nature 520, 656–660 (2015).
Bandurin, D. A. et al. High electron mobility, quantum Hall effect and anomalous optical response in atomically thin InSe. Nat. Nanotechnol. 12, 223–227 (2017).
Hwang, E. et al. Polar ohmic contact switching with a ferroelectric metal. ACS Appl. Mater. Interfaces 17, 22984–22991 (2025).
Zhang, X. et al. Van der Waals-interface-dominated all-2D electronics. Adv. Mater. 35, 2207966 (2023).
van der Zande, A. M. et al. Grains and grain boundaries in highly crystalline monolayer molybdenum disulphide. Nat. Mater. 12, 554–561 (2013).
Man, P., Srolovitz, D., Zhao, J. & Ly, T. H. Functional grain boundaries in two-dimensional transition-metal dichalcogenides. Acc. Chem. Res. 54, 4191–4202 (2021).
Hus, S. M. et al. Observation of single-defect memristor in an MoS2 atomic sheet. Nat. Nanotechnol. 16, 58–62 (2021).
Mak, K. F., Lee, C., Hone, J., Shan, J. & Heinz, T. F. Atomically thin MoS2: a new direct-gap semiconductor. Phys. Rev. Lett. 105, 136805 (2010).
Kim, D. et al. Atomic-scale thermopower in charge density wave states. Nat. Commun. 13, 4516 (2022).
Eshete, Y. A. et al. A polymorphic memtransistor with tunable metallic and semiconducting channel. Adv. Mater. 35, 2209089 (2023).
Hwang, E. et al. Ferroelectric-induced phase change device with polymorphic Mo1−xWxTe2 for neuromorphic computing. Small https://doi.org/10.1002/smll.202505378 (2025).
Kim, D. et al. Phase engineering of 2D materials. Chem. Rev. 123, 11230–11268 (2023).
Yang, H., Kim, S. W., Chhowalla, M. & Lee, Y. H. Structural and quantum-state phase transitions in van der Waals layered materials. Nat. Phys. 13, 931–937 (2017).
Voiry, D., Mohite, A. & Chhowalla, M. Phase engineering of transition metal dichalcogenides. Chem. Soc. Rev. 44, 2702–2712 (2015).
Si, M. et al. A ferroelectric semiconductor field-effect transistor. Nat. Electron. 2, 580–586 (2019).
Huang, Y.-T. et al. Two-dimensional In2Se3: a rising advanced material for ferroelectric data storage. InfoMat 4, e12341 (2022).
Wang, X. et al. Interfacial ferroelectricity in rhombohedral-stacked bilayer transition metal dichalcogenides. Nat. Nanotechnol. 17, 367–371 (2022).
Joo, Y., Hwang, E., Watanabe, K., Taniguchi, T. & Yang, H. Polymorphic ferroelectricity in artificially stacked MoS2 interfaces. ACS Appl. Electron. Mater. 6, 6868–6875 (2024).
Fei, Z. et al. Ferroelectric switching of a two-dimensional metal. Nature 560, 336–339 (2018).
Jindal, A. et al. Coupled ferroelectricity and superconductivity in bilayer Td-MoTe2. Nature 613, 48–52 (2023).
Yuan, S. et al. Room-temperature ferroelectricity in MoTe2 down to the atomic monolayer limit. Nat. Commun. 10, 1775 (2019).
Eshete, Y. A. et al. Atomic and electronic manipulation of robust ferroelectric polymorphs. Adv. Mater. 34, 2202633 (2022).
Kim, D. et al. Thermal biasing for lattice symmetry breaking and topological edge state imaging. Nat. Commun. 16, 1879 (2025).
Mao, X.-R., Shao, Z.-K., Luan, H.-Y., Wang, S.-L. & Ma, R.-M. Magic-angle lasers in nanostructured moiré superlattice. Nat. Nanotechnol. 16, 1099–1105 (2021).
Kang, K. et al. Switchable moiré potentials in ferroelectric WTe2/WSe2 superlattices. Nat. Nanotechnol. 18, 861–866 (2023).
Liu, C.-H., Chang, Y.-C., Norris, T. B. & Zhong, Z. Graphene photodetectors with ultra-broadband and high responsivity at room temperature. Nat. Nanotechnol. 9, 273–278 (2014).
Wang, A., Chen, R., Yun, Y., Xu, J. & Zhang, J. Review of ferroelectric materials and devices toward ultralow voltage operation. Adv. Funct. Mater. 35, 2412332 (2025).
Wang, S. et al. Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing. Nat. Commun. 12, 53 (2021).
Tao, Q. et al. Reconfigurable electronics by disassembling and reassembling van der Waals heterostructures. Nat. Commun. 12, 1825 (2021).
Ram, A. et al. Reconfigurable multifunctional van der Waals ferroelectric devices and logic circuits. ACS Nano 17, 21865–21877 (2023).
Lee, S.-H., Jung, Y. & Agarwal, R. Highly scalable non-volatile and ultra-low-power phase-change nanowire memory. Nat. Nanotechnol. 2, 626–630 (2007).
Lee, B. C., Ipek, E., Mutlu, O. & Burger, D. Architecting phase change memory as a scalable DRAM alternative. In Proc. 36th Annu. Int. Symp. Comput. Architect. 2–13 (ACM, 2009).
Wang, W. J. et al. Fast phase transitions induced by picosecond electrical pulses on phase change memory cells. Appl. Phys. Lett. 93, 043121 (2008).
Loke, D. et al. Breaking the speed limits of phase-change memory. Science 336, 1566–1569 (2012).
Qureshi, M. K., Franceschini, M. M., Lastras-Montaño, L. A. & Karidis, J. P. Morphable memory system: a robust architecture for exploiting multi-level phase change memories. In Proc. 37th Annu. Int. Symp. Comput. Architect. 153–162 (ACM, 2010).
Kuzum, D., Jeyasingh, R. G. D., Lee, B. & Wong, H. S. P. Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing. Nano Lett. 12, 2179–2186 (2012).
Simpson, R. E. et al. Interfacial phase-change memory. Nat. Nanotechnol. 6, 501–505 (2011).
Horii, H. et al. A novel cell technology using N-doped GeSbTe films for phase change RAM. In Symp. VLSI Technol. Digest Techn. Papers 177–178 (IEEE, 2003).
Burr, G. W. et al. Recent progress in phase-change memory technology. IEEE J. Emerg. Sel. Top. Circuits Syst. 6, 146–162 (2016).
Noé, P., Vallée, C., Hippert, F., Fillot, F. & Raty, J.-Y. Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues. Semicond. Sci. Technol. 33, 013002 (2018).
Fong, S. W., Neumann, C. M. & Wong, H. S. P. Phase-change memory — towards a storage-class memory. IEEE Trans. Electron. Devices 64, 4374–4385 (2017).
Guo, P., Sarangan, A. M. & Agha, I. A review of germanium-antimony-telluride phase change materials for non-volatile memories and optical modulators. Appl. Sci. 9, 530 (2019).
Le Gallo, M. & Sebastian, A. An overview of phase-change memory device physics. J. Phys. D 53, 213002 (2020).
Li, W., Qian, X. & Li, J. Phase transitions in 2D materials. Nat. Rev. Mater. 6, 829–846 (2021).
Bergeron, H., Lebedev, D. & Hersam, M. C. Polymorphism in post-dichalcogenide two-dimensional materials. Chem. Rev. 121, 2713–2775 (2021).
Cho, S. et al. Phase patterning for ohmic homojunction contact in MoTe2. Science 349, 625–628 (2015).
Keum, D. H. et al. Bandgap opening in few-layered monoclinic MoTe2. Nat. Phys. 11, 482–486 (2015).
Song, S. et al. Room temperature semiconductor–metal transition of MoTe2 thin films engineered by strain. Nano Lett. 16, 188–193 (2016).
Li, Y., Duerloo, K.-A. N., Wauson, K. & Reed, E. J. Structural semiconductor-to-semimetal phase transition in two-dimensional materials induced by electrostatic gating. Nat. Commun. 7, 10671 (2016).
Zhang, F. et al. Electric-field induced structural transition in vertical MoTe2- and Mo1–xWxTe2-based resistive memories. Nat. Mater. 18, 55–61 (2019).
Kowalczyk, H. et al. Gate and temperature driven phase transitions in few-layer MoTe2. ACS Nano 17, 6708–6718 (2023).
Zhang, C. et al. Charge mediated reversible metal–insulator transition in monolayer MoTe2 and WxMo1–xTe2 alloy. ACS Nano 10, 7370–7375 (2016).
Zhu, X., Li, D., Liang, X. & Lu, W. D. Ionic modulation and ionic coupling effects in MoS2 devices for neuromorphic computing. Nat. Mater. 18, 141–148 (2019).
Park, H. & Kim, J. Programmable synapse-like MoS2 field-effect transistors phase-engineered by dynamic lithium ion modulation. Adv. Electron. Mater. 6, 1901410 (2020).
Rupom, R. H. et al. Ion-induced phase changes in 2D MoTe2 films for neuromorphic synaptic device applications. ACS Nano 19, 2529–2539 (2025).
Lee, E., Kim, J., Bhoyate, S., Cho, K. & Choi, W. Realizing scalable two-dimensional MoS2 synaptic devices for neuromorphic computing. Chem. Mater. 32, 10447–10455 (2020).
Hou, W. et al. Strain engineering of vertical molybdenum ditelluride phase-change memristors. Nat. Electron. 7, 8–16 (2024).
Lacaita, A. L. & Redaelli, A. The race of phase change memories to nanoscale storage and applications. Microelectron. Eng. 109, 351–356 (2013).
Sangwan, V. K. et al. Gate-tunable memristive phenomena mediated by grain boundaries in single-layer MoS2. Nat. Nanotechnol. 10, 403–406 (2015).
Sangwan, V. K. et al. Multi-terminal memtransistors from polycrystalline monolayer molybdenum disulfide. Nature 554, 500–504 (2018).
Wang, X. et al. Grain-boundary engineering of monolayer MoS2 for energy-efficient lateral synaptic devices. Adv. Mater. 33, 2102435 (2021).
You, T., Zhao, M., Fan, Z. & Ju, C. Emerging memtransistors for neuromorphic system applications: a review. Sensors 23, 5413 (2023).
Huang, C.-H. et al. Artificial synapse based on a 2D-SnO2 memtransistor with dynamically tunable analog switching for neuromorphic computing. ACS Appl. Mater. Interfaces 13, 52822–52832 (2021).
Bae, J., Won, J. & Shim, W. The rise of memtransistors for neuromorphic hardware and in-memory computing. Nano Energy 126, 109646 (2024).
Azizi, A. et al. Dislocation motion and grain boundary migration in two-dimensional tungsten disulphide. Nat. Commun. 5, 4867 (2014).
Li, M. et al. Imperfection-enabled memristive switching in van der Waals materials. Nat. Electron. 6, 491–505 (2023).
Chen, M. et al. Multibit data storage states formed in plasma-treated MoS2 transistors. ACS Nano 8, 4023–4032 (2014).
Najmaei, S. et al. Vapour phase growth and grain boundary structure of molybdenum disulphide atomic layers. Nat. Mater. 12, 754–759 (2013).
Karvonen, L. et al. Rapid visualization of grain boundaries in monolayer MoS2 by multiphoton microscopy. Nat. Commun. 8, 15714 (2017).
Yao, W., Wu, B. & Liu, Y. Growth and grain boundaries in 2D materials. ACS Nano 14, 9320–9346 (2020).
Li, C. et al. Electric field-dependent evolution dynamics of conductive filaments in 2D material-based planar memristors. ACS Nano 18, 32196–32204 (2024).
Liu, S. E., Zeng, T. T., Wu, R., Sangwan, V. K. & Hersam, M. C. Low-voltage short-channel MoS2 memtransistors with high gate-tunability. J. Mater. Res. 39, 1463–1472 (2024).
Huh, W. et al. Heterosynaptic MoS2 memtransistors emulating biological neuromodulation for energy-efficient neuromorphic electronics. Adv. Mater. 35, 2211525 (2023).
Xia, Q. et al. Memristor−CMOS hybrid integrated circuits for reconfigurable logic. Nano Lett. 9, 3640–3645 (2009).
Mittal, S. A survey of ReRAM-based architectures for processing-in-memory and neural networks. Mach. Learn. Knowl. Extr. 1, 75–114 (2019).
Yan, X., Qian, J. H., Sangwan, V. K. & Hersam, M. C. Progress and challenges for memtransistors in neuromorphic circuits and systems. Adv. Mater. 34, 2108025 (2022).
Jones, R. E. et al. Ferroelectric non-volatile memories for low-voltage, low-power applications. Thin Solid Films 270, 584–588 (1995).
Kim, M.-K., Kim, I.-J. & Lee, J.-S. CMOS-compatible ferroelectric NAND flash memory for high-density, low-power, and high-speed three-dimensional memory. Sci. Adv. 7, eabe1341 (2021).
Gao, P. et al. Possible absence of critical thickness and size effect in ultrathin perovskite ferroelectric films. Nat. Commun. 8, 15549 (2017).
Schroeder, U., Park, M. H., Mikolajick, T. & Hwang, C. S. The fundamentals and applications of ferroelectric HfO2. Nat. Rev. Mater. 7, 653–669 (2022).
Junquera, J. & Ghosez, P. Critical thickness for ferroelectricity in perovskite ultrathin films. Nature 422, 506–509 (2003).
Ma, T. P. & Han, J.-P. Why is nonvolatile ferroelectric memory field-effect transistor still elusive? IEEE Electron. Device Lett. 23, 386–388 (2002).
Kim, J.-H., Kim, S.-H. & Yu, H.-Y. Enhanced electrical polarization in van der Waals α-In2Se3 ferroelectric semiconductor field-effect transistors by eliminating surface screening charge. Small 20, 2405459 (2024).
Ding, W. et al. Prediction of intrinsic two-dimensional ferroelectrics in In2Se3 and other III2–VI3 van der Waals materials. Nat. Commun. 8, 14956 (2017).
Yang, J. et al. Ultrasensitive ferroelectric semiconductor phototransistors for photon-level detection. Adv. Funct. Mater. 32, 2205468 (2022).
Xu, K. et al. Optical control of ferroelectric switching and multifunctional devices based on van der Waals ferroelectric semiconductors. Nanoscale 12, 23488–23496 (2020).
Puglia, G. O., Zorzo, A. F., Rose, C. A. F. D., Perez, T. & Milojicic, D. Non-volatile memory file systems: a survey. IEEE Access. 7, 25836–25871 (2019).
Laguerre, J. et al. Data retention insights from joint analysis on beol-integrated HZO-based scaled FeCAPs and 16kbit 1T-1C FeRAM arrays. In IEEE Int. Reliab. Phys. Symp. (IEEE, 2024).
Zheng, Z. et al. Unconventional ferroelectricity in moiré heterostructures. Nature 588, 71–76 (2020).
Shi, Q. et al. The role of lattice dynamics in ferroelectric switching. Nat. Commun. 13, 1110 (2022).
Niu, R. et al. Giant ferroelectric polarization in a bilayer graphene heterostructure. Nat. Commun. 13, 6241 (2022).
Wang, P. et al. Moiré synaptic transistor for homogeneous-architecture reservoir computing. Chin. Phys. Lett. 40, 117201 (2023).
Zheng, Z. Electronic ratchet effect in a moiré system: signatures of excitonic ferroelectricity. Preprint at https://arxiv.org/abs/2306.03922 (2023).
Zhang, L. et al. Electronic ferroelectricity in monolayer graphene moiré superlattices. Nat. Commun. 15, 10905 (2024).
Prakash, A., Jana, D. & Maikap, S. TaOx-based resistive switching memories: prospective and challenges. Nanoscale Res. Lett. 8, 418 (2013).
Li, X. et al. Sliding ferroelectric memories and synapses based on rhombohedral-stacked bilayer MoS2. Nat. Commun. 15, 10921 (2024).
Jiang, H. et al. A novel true random number generator based on a stochastic diffusive memristor. Nat. Commun. 8, 882 (2017).
Wang, Z. et al. Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. Nat. Mater. 16, 101–108 (2017).
Morozov, S. V., Novoselov, K. S. & Geim, A. K. Electron transport in graphene. Phys. Uspekhi 51, 744 (2008).
Xie, Y. et al. Measuring bulk and surface acoustic modes in diamond by angle-resolved Brillouin spectroscopy. Sci. China Phys. Mech. Astron. 64, 287311 (2021).
Liu, H., Neal, A. T. & Ye, P. D. Channel length scaling of MoS2 MOSFETs. ACS Nano 6, 8563–8569 (2012).
Wei, T. et al. Two dimensional semiconducting materials for ultimately scaled transistors. iScience 25, 105160 (2022).
Miao, J. et al. Lateral electric field engineering in scaled transistors based on 2D materials via phase transition. ACS Nano 19, 18292–18300 (2025).
Fang, Q. H. & Liu, Y. W. Size-dependent interaction between an edge dislocation and a nanoscale inhomogeneity with interface effects. Acta Mater. 54, 4213–4220 (2006).
Duan, C.-G., Sabirianov, R. F., Mei, W.-N., Jaswal, S. S. & Tsymbal, E. Y. Interface effect on ferroelectricity at the nanoscale. Nano Lett. 6, 483–487 (2006).
Yoon, J. S., Kim, K., Rim, T. & Baek, C. K. Performance and variations induced by single interface trap of nanowire FETs at 7-nm node. IEEE Trans. Electron. Devices 64, 339–345 (2017).
Meier, D. L. & Schroder, D. K. Contact resistance: its measurement and relative importance to power loss in a solar cell. IEEE Trans. Electron. Devices 31, 647–653 (1984).
Lee, S. K., Zetterling, C. M., Östling, M., Palmquist, J. P. & Jansson, U. Low resistivity ohmic contacts on 4H-silicon carbide for high power and high temperature device applications. Microelectron. Eng. 60, 261–268 (2002).
Lenfant, S. et al. Electron transport through rectifying self-assembled monolayer diodes on silicon: Fermi-level pinning at the molecule−metal interface. J. Phys. Chem. B 110, 13947–13958 (2006).
Himpsel, F. J., Hollinger, G. & Pollak, R. A. Determination of the Fermi-level pinning position at Si(111) surfaces. Phys. Rev. B 28, 7014–7018 (1983).
Chadi, D. J. et al. Fermi-level-pinning defects in highly n-doped silicon. Phys. Rev. Lett. 79, 4834–4837 (1997).
Veeraraghavan, S. & Fossum, J. G. Short-channel effects in SOI MOSFETs. IEEE Trans. Electron. Devices 36, 522–528 (1989).
Chaudhry, A. & Kumar, M. J. Controlling short-channel effects in deep-submicron SOI MOSFETs for improved reliability: a review. IEEE Trans. Device Mater. Reliab. 4, 99–109 (2004).
Gill, A., Madhu, C. & Kaur, P. Investigation of short channel effects in bulk MOSFET and SOI FinFET at 20nm node technology. In Annu. IEEE India Conf. (IEEE, 2015).
Yang, H. et al. Graphene barristor, a triode device with a gate-controlled Schottky barrier. Science 336, 1140–1143 (2012).
Heo, S. et al. Ternary full adder using multi-threshold voltage graphene barristors. IEEE Electron. Device Lett. 39, 1948–1951 (2018).
Oh, G. et al. Graphene/pentacene barristor with ion-gel gate dielectric: flexible ambipolar transistor with high mobility and On/Off ratio. ACS Nano 9, 7515–7522 (2015).
Hwang, H. J. et al. A graphene barristor using nitrogen profile controlled ZnO Schottky contacts. Nanoscale 9, 2442–2448 (2017).
Choi, S. et al. Energy-efficient three-terminal SiOx memristor crossbar array enabled by vertical Si/graphene heterojunction barristor. Nano Energy 84, 105947 (2021).
Britnell, L. et al. Field-effect tunneling transistor based on vertical graphene heterostructures. Science 335, 947–950 (2012).
Jahangir, I., Uddin, M. A., Singh, A. K., Chandrashekhar, M. & Koley, G. Graphene/MoS2 thin film based two dimensional barristors with tunable Schottky barrier for sensing applications. IEEE Sens. J. 21, 26549–26555 (2021).
Jahangir, I., Uddin, M. A., Singh, A. K., Koley, G. & Chandrashekhar, M. V. S. Richardson constant and electrostatics in transfer-free CVD grown few-layer MoS2/graphene barristor with Schottky barrier modulation >0.6eV. Appl. Phys. Lett. 111, 142101 (2017).
Shin, D.-H. et al. Low-power complementary inverter based on graphene/carbon-nanotube and graphene/MoS2 barristors. Nanomaterials 12, 3820 (2022).
Widiapradja, L. J., Hong, S., Jeong, Y. & Im, S. Maximizing Schottky barrier modulation in graphene-WSe2/MoSe2 heterojunction barristor through Dirac-cone induced phenomenon. Carbon 221, 118920 (2024).
Huh, W. et al. Synaptic barristor based on phase-engineered 2D heterostructures. Adv. Mater. 30, 1801447 (2018).
Bach, T. P.-A. et al. Schottky barrier height modulation and photoconductivity in a vertical graphene/ReSe2 vdW p-n heterojunction barristor. J. Mater. Res. Technol. 17, 2796–2806 (2022).
Jang, S. et al. Three-terminal vertical ferroelectric synaptic barristor enabled by HZO/graphene heterostructure with rebound depolarization. J. Alloy. Compd. 965, 171247 (2023).
Kim, D. J. et al. Retention of resistance states in ferroelectric tunnel memristors. Appl. Phys. Lett. 103, 142908 (2013).
Ma, C. et al. Sub-nanosecond memristor based on ferroelectric tunnel junction. Nat. Commun. 11, 1439 (2020).
Wen, Z., Li, C., Wu, D., Li, A. & Ming, N. Ferroelectric-field-effect-enhanced electroresistance in metal/ferroelectric/semiconductor tunnel junctions. Nat. Mater. 12, 617–621 (2013).
Ihlefeld, J. F. et al. Scaling effects in perovskite ferroelectrics: fundamental limits and process-structure-property relations. J. Am. Ceram. Soc. 99, 2537–2557 (2016).
Du, X. et al. High-speed switching and giant electroresistance in an epitaxial Hf0.5Zr0.5O2-based ferroelectric tunnel junction memristor. ACS Appl. Mater. Interfaces 14, 1355–1361 (2022).
Wen, Z. & Wu, D. Ferroelectric tunnel junctions: modulations on the potential barrier. Adv. Mater. 32, 1904123 (2020).
Lim, E., Kim, D., Park, J., Koo, M. & Kim, S. Recent advances in the mechanism, properties, and applications of hafnia ferroelectric tunnel junctions. J. Phys. D 57, 473001 (2024).
Wu, J. et al. High tunnelling electroresistance in a ferroelectric van der Waals heterojunction via giant barrier height modulation. Nat. Electron. 3, 466–472 (2020).
Jia, T. et al. Ferroelectricity and piezoelectricity in 2D van der Waals CuInP2S6 ferroelectric tunnel junctions. Nanomaterials 12, 2516 (2022).
Wang, Q. et al. Extraordinary tunnel electroresistance in layer-by-layer engineered van der Waals ferroelectric tunnel junctions. Matter 5, 4425–4436 (2022).
Wang, Q. et al. Gate-tunable giant tunneling electroresistance in van der Waals ferroelectric tunneling junctions. Mater. Sci. Eng. B 283, 115829 (2022).
Liu, F. et al. Room-temperature ferroelectricity in CuInP2S6 ultrathin flakes. Nat. Commun. 7, 12357 (2016).
Baek, S. et al. Ferroelectric field-effect-transistor integrated with ferroelectrics heterostructure. Adv. Sci. 9, 2200566 (2022).
Jiang, J. et al. Ultrashort vertical-channel van der Waals semiconductor transistors. Adv. Sci. 7, 1902964 (2020).
Li, H. et al. Recent experimental breakthroughs on 2D transistors: approaching the theoretical limit. Adv. Funct. Mater. 34, 2402474 (2024).
Zou, X., Liu, L., Xu, J., Wang, H. & Tang, W.-M. Few-layered MoS2 field-effect transistors with a vertical channel of sub-10 nm. ACS Appl. Mater. Interfaces 12, 32943–32950 (2020).
Liu, L. et al. Ultrashort vertical-channel MoS2 transistor using a self-aligned contact. Nat. Commun. 15, 165 (2024).
Jia, X. et al. Nanoscale channel length MoS2 vertical field-effect transistor arrays with side-wall source/drain electrodes. ACS Appl. Mater. Interfaces 16, 16544–16552 (2024).
Lee, T. S. et al. Compliance current-controlled conducting filament formation in tantalum oxide-based RRAM devices with different top electrodes. ACS Appl. Electron. Mater. 2, 1154–1161 (2020).
Clarke, H., Deremo, L., Anderson, J., Ganguli, S. & Shamberger, P. J. Conductive filament shape in HfO2 electrochemical metallization cells under a range of forming voltages. Nanotechnology 31, 075706 (2020).
She, Y. et al. Oxygen vacancy-dependent synaptic dynamic behavior of TiOx-based transparent memristor. IEEE Trans. Electron. Devices 68, 1950–1955 (2021).
Chung, Y.-L. et al. Joint contributions of Ag ions and oxygen vacancies to conducting filament evolution of Ag/TaOx/Pt memory device. J. Appl. Phys. 116, 164502 (2014).
Wang, Y. et al. High on/off ratio black phosphorus based memristor with ultra-thin phosphorus oxide layer. Appl. Phys. Lett. 115, 193503 (2019).
Zhao, L. et al. Ultrathin (~2nm) HfOx as the fundamental resistive switching element: thickness scaling limit, stack engineering and 3D integration. In 2014 IEEE Int. Electron Devices Meet. 6.6.1–6.6.4 (IEEE, 2014).
Li, X.-D. et al. Resistive memory devices at the thinnest limit: progress and challenges. Adv. Mater. 36, 2307951 (2024).
Zahoor, F., Azni Zulkifli, T. Z. & Khanday, F. A. Resistive random access memory (RRAM): an overview of materials, switching mechanism, performance, multilevel cell (MLC) storage, modeling, and applications. Nanoscale Res. Lett. 15, 90 (2020).
Lee, J., Du, C., Sun, K., Kioupakis, E. & Lu, W. D. Tuning ionic transport in memristive devices by graphene with engineered nanopores. ACS Nano 10, 3571–3579 (2016).
Nikam, R. D. & Hwang, H. Atomic threshold switch based on all-2D material heterostructures with excellent control over filament growth and volatility. Adv. Funct. Mater. 32, 2201749 (2022).
Chen, S. et al. Wafer-scale integration of two-dimensional materials in high-density memristive crossbar arrays for artificial neural networks. Nat. Electron. 3, 638–645 (2020).
Sun, L. et al. Self-selective van der Waals heterostructures for large scale memory array. Nat. Commun. 10, 3161 (2019).
Wang, X.-F. et al. Two-mode MoS2 filament transistor with extremely low subthreshold swing and record high on/off ratio. ACS Nano 13, 2205–2212 (2019).
Xie, M. et al. Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T–4R structure for high-density memory. Nat. Commun. 14, 5952 (2023).
Kim, J. et al. Switching power universality in unipolar resistive switching memories. Sci. Rep. 6, 23930 (2016).
Lee, K. et al. Enhancement of resistive switching under confined current path distribution enabled by insertion of atomically thin defective monolayer graphene. Sci. Rep. 5, 11279 (2015).
Ge, R. et al. A library of atomically thin 2D materials featuring the conductive-point resistive switching phenomenon. Adv. Mater. 33, 2007792 (2021).
Ge, R. et al. Atomristor: nonvolatile resistance switching in atomic sheets of transition metal dichalcogenides. Nano Lett. 18, 434–441 (2018).
Wu, X. et al. Thinnest nonvolatile memory based on monolayer h-BN. Adv. Mater. 31, 1806790 (2019).
Li, X.-D., Wang, B.-Q., Chen, N.-K. & Li, X.-B. Resistive switching mechanism of MoS2 based atomristor. Nanotechnology 34, 205201 (2023).
Yang, S. J. et al. Reconfigurable low-voltage hexagonal boron nitride nonvolatile switches for millimeter-wave wireless communications. Nano Lett. 23, 1152–1158 (2023).
Lu, X. F. et al. Exploring low power and ultrafast memristor on p-type van der Waals SnS. Nano Lett. 21, 8800–8807 (2021).
Hong, H. et al. Dynamic convolutional neural networks based on adaptive 2D memristors. Adv. Funct. Mater. 35, 2422321 (2025).
Yuan, Y. et al. On-chip atomristors. Mater. Sci. Eng. R Rep. 165, 101006 (2025).
Rajput, M. et al. Defect-engineered monolayer MoS2 with enhanced memristive and synaptic functionality for neuromorphic computing. Commun. Mater. 5, 190 (2024).
Shen, P.-C. et al. Ultralow contact resistance between semimetal and monolayer semiconductors. Nature 593, 211–217 (2021).
Chuang, H.-J. et al. Low-resistance 2D/2D ohmic contacts: a universal approach to high-performance WSe2, MoS2, and MoSe2 transistors. Nano Lett. 16, 1896–1902 (2016).
Mondal, A. et al. Low ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer. Nat. Nanotechnol. 19, 34–43 (2024).
International Roadmap for Devices and Systems. International Roadmap for Devices and Systems (IRDS) 2022 edition. IRDS http://irds.ieee.org/editions (IEEE, 2022).
Yu, H. et al. MIS or MS? Source/drain contact scheme evaluation for 7nm Si CMOS technology and beyond. In 2016 16th Int. Workshop Junct. Technol. 19–24 (IEEE, 2016).
Datta, S., Chakraborty, W. & Radosavljevic, M. Toward attojoule switching energy in logic transistors. Science 378, 733–740 (2022).
Li, W. et al. Approaching the quantum limit in two-dimensional semiconductor contacts. Nature 613, 274–279 (2023).
Wang, L. et al. One-dimensional electrical contact to a two-dimensional material. Science 342, 614–617 (2013).
Choi, M. S. et al. Recent progress in 1D contacts for 2D-material-based devices. Adv. Mater. 34, 2202408 (2022).
Kappera, R. et al. Phase-engineered low-resistance contacts for ultrathin MoS2 transistors. Nat. Mater. 13, 1128–1134 (2014).
Liu, Y. et al. Approaching the Schottky–Mott limit in van der Waals metal–semiconductor junctions. Nature 557, 696–700 (2018).
Kwon, G. et al. Interaction- and defect-free van der Waals contacts between metals and two-dimensional semiconductors. Nat. Electron. 5, 241–247 (2022).
Liu, L. et al. Transferred van der Waals metal electrodes for sub-1-nm MoS2 vertical transistors. Nat. Electron. 4, 342–347 (2021).
Jena, D., Banerjee, K. & Xing, G. H. Intimate contacts. Nat. Mater. 13, 1076–1078 (2014).
Allain, A., Kang, J., Banerjee, K. & Kis, A. Electrical contacts to two-dimensional semiconductors. Nat. Mater. 14, 1195–1205 (2015).
Chhowalla, M., Jena, D. & Zhang, H. Two-dimensional semiconductors for transistors. Nat. Rev. Mater. 1, 16052 (2016).
Cai, X. et al. Bridging the gap between atomically thin semiconductors and metal leads. Nat. Commun. 13, 1777 (2022).
Tan, Y. et al. Controllable 2H-to-1T′ phase transition in few-layer MoTe2. Nanoscale 10, 19964–19971 (2018).
Ryu, H. et al. Laser-induced phase transition and patterning of hBN-encapsulated MoTe2. Small 19, 2205224 (2023).
Jiang, J., Xu, L., Qiu, C. & Peng, L.-M. Ballistic two-dimensional InSe transistors. Nature 616, 470–475 (2023).
Jiang, J. et al. Yttrium-doping-induced metallization of molybdenum disulfide for ohmic contacts in two-dimensional transistors. Nat. Electron. 7, 545–556 (2024).
Wu, P. & Kong, J. Doping for ohmic contacts in 2D transistors. Nat. Electron. 7, 519–520 (2024).
Shur, M. S. & Eastman, L. F. Ballistic transport in semiconductor at low temperatures for low-power high-speed logic. IEEE Trans. Electron. Devices 26, 1677–1683 (1979).
Wang, Y. et al. P-type electrical contacts for 2D transition-metal dichalcogenides. Nature 610, 61–66 (2022).
Chuang, S. et al. MoS2 P-type transistors and diodes enabled by high work function MoOx contacts. Nano Lett. 14, 1337–1342 (2014).
Nakaharai, S., Yamamoto, M., Ueno, K. & Tsukagoshi, K. Carrier polarity control in α-MoTe2 Schottky junctions based on weak Fermi-level pinning. ACS Appl. Mater. Interfaces 8, 14732–14739 (2016).
Derry, G. N., Kern, M. E. & Worth, E. H. Recommended values of clean metal surface work functions. J. Vac. Sci. Technol. A 33, 060801 (2015).
Liu, X. et al. On-device phase engineering. Nat. Mater. 23, 1363–1369 (2024).
Lee, Y. & Yang, H. Tailoring phases on the device. Nat. Mater. 23, 1309–1310 (2024).
Banerjee, W., Kashir, A. & Kamba, S. Hafnium oxide (HfO2) — a multifunctional oxide: a review on the prospect and challenges of hafnium oxide in resistive switching and ferroelectric memories. Small 18, 2107575 (2022).
Li, W. et al. Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices. Nat. Electron. 2, 563–571 (2019).
Liu, K. et al. A wafer-scale van der Waals dielectric made from an inorganic molecular crystal film. Nat. Electron. 4, 906–913 (2021).
Knobloch, T. et al. The performance limits of hexagonal boron nitride as an insulator for scaled CMOS devices based on two-dimensional materials. Nat. Electron. 4, 98–108 (2021).
Illarionov, Y. Y. et al. Insulators for 2D nanoelectronics: the gap to bridge. Nat. Commun. 11, 3385 (2020).
Yang, S. et al. Gate dielectrics integration for 2D electronics: challenges, advances, and outlook. Adv. Mater. 35, 2207901 (2023).
Choi, J. H., Mao, Y. & Chang, J. P. Development of hafnium based high-k materials — a review. Mater. Sci. Eng. R Rep. 72, 97–136 (2011).
Robertson, J. & Wallace, R. M. High-K materials and metal gates for CMOS applications. Mater. Sci. Eng. R Rep. 88, 1–41 (2015).
Peacock, P. W., Xiong, K., Tse, K. & Robertson, J. Bonding and interface states of Si:HfO2 and Si:ZrO2 interfaces. Phys. Rev. B 73, 075328 (2006).
Tang, J. et al. Low-power 2D gate-all-around logics via epitaxial monolithic 3D integration. Nat. Mater. 24, 519–526 (2025).
Yin, L. et al. High-κ monocrystalline dielectrics for low-power two-dimensional electronics. Nat. Mater. 24, 197–204 (2025).
Kang, T. et al. High-κ dielectric (HfO2)/2D semiconductor (HfSe2) gate stack for low-power steep-switching computing devices. Adv. Mater. 36, 2312747 (2024).
Luo, P. et al. Molybdenum disulfide transistors with enlarged van der Waals gaps at their dielectric interface via oxygen accumulation. Nat. Electron. 5, 849–858 (2022).
Agrawal, A. et al. Silicon ribbonFET CMOS at 6nm gate length. In 2024 IEEE Int. Electron Devices Meet. (IEEE, 2024).
Ding, X. et al. Bi2O2Se: a rising star for semiconductor devices. Matter 5, 4274–4314 (2022).
Zhang, Y. et al. A single-crystalline native dielectric for two-dimensional semiconductors with an equivalent oxide thickness below 0.5 nm. Nat. Electron. 5, 643–649 (2022).
Tan, C. et al. 2D fin field-effect transistors integrated with epitaxial high-k gate oxide. Nature 616, 66–72 (2023).
Yoon, C. W. The fundamentals of NAND flash memory: technology for tomorrow’s fourth industrial revolution. IEEE Solid-State Circuits Mag. 14, 56–65 (2022).
Bubnova, O. 2D materials for fast flash memory devices. Nat. Nanotechnol. 17, 1238–1238 (2022).
Hattori, Y., Taniguchi, T., Watanabe, K. & Nagashio, K. Layer-by-layer dielectric breakdown of hexagonal boron nitride. ACS Nano 9, 916–921 (2015).
Ranjan, A. et al. Dielectric breakdown in single-crystal hexagonal boron nitride. ACS Appl. Electron. Mater. 3, 3547–3554 (2021).
Kouchi, T. et al. A 128Gb 1-bit/cell 96-word-line-layer 3D flash memory to improve the random read latency with tPROG = 75 µs and tR = 4 µs. In 2020 IEEE Int. Solid-State Circuits Conf. 226–228 (IEEE, 2020).
Tan, T., Jiang, X., Wang, C., Yao, B. & Zhang, H. 2D material optoelectronics for information functional device applications: status and challenges. Adv. Sci. 7, 2000058 (2020).
Gao, F. et al. High-performance van der Waals metal-insulator-semiconductor photodetector optimized with valence band matching. Adv. Funct. Mater. 31, 2104359 (2021).
Hüser, F., Olsen, T. & Thygesen, K. S. How dielectric screening in two-dimensional crystals affects the convergence of excited-state calculations: monolayer MoS2. Phys. Rev. B 88, 245309 (2013).
Britnell, L. et al. Strong light–matter interactions in heterostructures of atomically thin films. Science 340, 1311–1314 (2013).
Ahn, J., Yeon, E. & Hwang, D. K. Recent progress in 2D heterostructures for high-performance photodetectors and their applications. Adv. Opt. Mater. 13, 2403412 (2025).
Zhang, Y. et al. Direct observation of the transition from indirect to direct bandgap in atomically thin epitaxial MoSe2. Nat. Nanotechnol. 9, 111–115 (2014).
Jiang, J. et al. Recent advances in 2D materials for photodetectors. Adv. Electron. Mater. 7, 2001125 (2021).
Wang, Y. et al. Ultrahigh-speed graphene-based optical coherent receiver. Nat. Commun. 12, 5076 (2021).
Hwang, A. et al. Visible and infrared dual-band imaging via Ge/MoS2 van der Waals heterostructure. Sci. Adv. 7, eabj2521 (2021).
Koepfli, S. M. et al. Metamaterial graphene photodetector with bandwidth exceeding 500 gigahertz. Science 380, 1169–1174 (2023).
Knispel, T. et al. Charge puddles in the bulk and on the surface of the topological insulator BiSbTeSe2 studied by scanning tunneling microscopy and optical spectroscopy. Phys. Rev. B 96, 195135 (2017).
Lischke, S. et al. Ultra-fast germanium photodiode with 3-dB bandwidth of 265 GHz. Nat. Photonics 15, 925–931 (2021).
Inoue, D. et al. Low-dark current 10 Gbit/s operation of InAs/InGaAs quantum dot p-i-n photodiode grown on on-axis (001) GaP/Si. Appl. Phys. Lett. 113, 093506 (2018).
Radisavljevic, B., Radenovic, A., Brivio, J., Giacometti, V. & Kis, A. Single-layer MoS2 transistors. Nat. Nanotechnol. 6, 147–150 (2011).
Xia, F., Mueller, T., Lin, Y. -m, Valdes-Garcia, A. & Avouris, P. Ultrafast graphene photodetector. Nat. Nanotechnol. 4, 839–843 (2009).
Li, T. et al. Epitaxial growth of wafer-scale molybdenum disulfide semiconductor single crystals on sapphire. Nat. Nanotechnol. 16, 1201–1207 (2021).
Lee, J. S. et al. Wafer-scale single-crystal hexagonal boron nitride film via self-collimated grain formation. Science 362, 817–821 (2018).
Kim, K. S. et al. Non-epitaxial single-crystal 2D material growth by geometric confinement. Nature 614, 88–94 (2023).
Kim, Y. et al. Remote epitaxy through graphene enables two-dimensional material-based layer transfer. Nature 544, 340–343 (2017).
Moon, D. et al. Hypotaxy of wafer-scale single-crystal transition metal dichalcogenides. Nature 638, 957–964 (2025).
Zhang, W. et al. An ultrathin memristor based on a two-dimensional WS2/MoS2 heterojunction. Nanoscale 13, 11497–11504 (2021).
Park, S.-O. et al. Phase-change memory via a phase-changeable self-confined nano-filament. Nature 628, 293–298 (2024).
Huang, B. et al. Emergent phenomena and proximity effects in two-dimensional magnets and heterostructures. Nat. Mater. 19, 1276–1289 (2020).
Kim, S. et al. Proximity engineering of the van der waals interaction in multilayered graphene. ACS Appl. Mater. Interfaces 11, 42528–42533 (2019).
Jeong, J. et al. Spin-selective memtransistors with magnetized graphene. Adv. Mater. 36, 2310291 (2024).
Reidy, K. et al. Direct imaging and electronic structure modulation of moiré superlattices at the 2D/3D interface. Nat. Commun. 12, 1290 (2021).
Huang, D., Choi, J., Shih, C.-K. & Li, X. Excitons in semiconductor moiré superlattices. Nat. Nanotechnol. 17, 227–238 (2022).
Yin, L.-J., Jiang, H., Qiao, J.-B. & He, L. Direct imaging of topological edge states at a bilayer graphene domain wall. Nat. Commun. 7, 11760 (2016).
Huang, F.-T. et al. Polar and phase domain walls with conducting interfacial states in a Weyl semimetal MoTe2. Nat. Commun. 10, 4211 (2019).
Pedramrazi, Z. et al. Manipulating topological domain boundaries in the single-layer quantum spin hall insulator 1T′–WSe2. Nano Lett. 19, 5634–5639 (2019).
Islam, Z. & Haque, A. Defects and grain boundary effects in MoS2: a molecular dynamics study. J. Phys. Chem. Solids 148, 109669 (2021).
Kim, S.-Y. et al. The impact of substrate surface defects on the properties of two-dimensional van der Waals heterostructures. Nanoscale 10, 19212–19219 (2018).
McGilly, L. J. et al. Visualization of moiré superlattices. Nat. Nanotechnol. 15, 580–584 (2020).
Zhao, M., Kim, D., Lee, Y. H., Yang, H. & Cho, S. Quantum sensing of thermoelectric power in low-dimensional materials. Adv. Mater. 35, 2106871 (2023).
Luo, C., Wang, C., Wu, X., Zhang, J. & Chu, J. In situ transmission electron microscopy characterization and manipulation of two-dimensional layered materials beyond graphene. Small 13, 1604259 (2017).
Zhao, M. et al. Coherent thermoelectric power from graphene quantum dots. Nano Lett. 19, 61–68 (2019).
Zhao, M. et al. Harnessing thermoelectric puddles via the stacking order and electronic screening in graphene. ACS Nano 15, 5397–5404 (2021).
Liu, C. et al. Small footprint transistor architecture for photoswitching logic and in situ memory. Nat. Nanotechnol. 14, 662–667 (2019).
Chen, H. et al. Logic gates based on neuristors made from two-dimensional materials. Nat. Electron. 4, 399–404 (2021).
Zeng, S. et al. An application-specific image processing array based on WSe2 transistors with electrically switchable logic functions. Nat. Commun. 13, 56 (2022).
Zhang, Z. et al. All-in-one two-dimensional retinomorphic hardware device for motion detection and recognition. Nat. Nanotechnol. 17, 27–32 (2022).
Pang, X. et al. Non-volatile rippled-assisted optoelectronic array for all-day motion detection and recognition. Nat. Commun. 15, 1613 (2024).
Zhu, K. et al. The development of integrated circuits based on two-dimensional materials. Nat. Electron. 4, 775–785 (2021).
Ma, J. et al. Circuit-level memory technologies and applications based on 2D materials. Adv. Mater. 34, 2202371 (2022).
Xia, X. et al. 2D-material-based volatile and nonvolatile memristive devices for neuromorphic computing. ACS Mater. Lett. 5, 1109–1135 (2023).
Naqi, M., Cho, Y., Bala, A. & Kim, S. The trend of synthesized 2D materials toward artificial intelligence: memory technology and neuromorphic computing. Mater. Today Electron. 5, 100052 (2023).
Chen, S. et al. Channel and contact length scaling of two-dimensional transistors using composite metal electrodes. Nat. Electron. 8, 394–402 (2025).
Xu, W., Min, S.-Y., Hwang, H. & Lee, T.-W. Organic core–sheath nanowire artificial synapses with femtojoule energy consumption. Sci. Adv. 2, e1501326 (2016).
Xu, Y., Liu, K., Xiong, X., Wu, Y. & Zhai, T. Towards state-of-the-art semiconductor/dielectric interface in two-dimensional electronics. J. Mater. Sci. Technol. 239, 93–108 (2025).
Subrina, S., Kotchetkov, D. & Balandin, A. A. Heat removal in silicon-on-insulator integrated circuits with graphene lateral heat spreaders. IEEE Electron. Device Lett. 30, 1281–1283 (2009).
Barua, A., Hossain, M. S., Masood, K. I. & Subrina, S. Thermal management in 3-D integrated circuits with graphene heat spreaders. Phys. Procedia 25, 311–316 (2012).
Kong, L. et al. Wafer-scale and universal van der Waals metal semiconductor contact. Nat. Commun. 14, 1014 (2023).
Duerloo, K.-A. N., Li, Y. & Reed, E. J. Structural phase transitions in two-dimensional Mo- and W-dichalcogenide monolayers. Nat. Commun. 5, 4214 (2014).
Duerloo, K.-A. N. & Reed, E. J. Structural phase transitions by design in monolayer alloys. ACS Nano 10, 289–297 (2016).
Akola, J. et al. Experimentally constrained density-functional calculations of the amorphous structure of the prototypical phase-change material Ge2Sb2Te5. Phys. Rev. B 80, 020201 (2009).
Wang, L. et al. Artificial synapses based on multiterminal memtransistors for neuromorphic application. Adv. Funct. Mater. 29, 1901106 (2019).
Xie, L. et al. Graphene-contacted ultrashort channel monolayer MoS2 transistors. Adv. Mater. 29, 1702522 (2017).
Nourbakhsh, A. et al. MoS2 field-effect transistor with sub-10 nm channel length. Nano Lett. 16, 7798–7806 (2016).
Xu, K. et al. Sub-10 nm nanopattern architecture for 2D material field-effect transistors. Nano Lett. 17, 1065–1070 (2017).
Patel, K. A., Grady, R. W., Smithe, K. K. H., Pop, E. & Sordan, R. Ultra-scaled MoS2 transistors and circuits fabricated without nanolithography. 2D Mater. 7, 015018 (2020).
Hutin, L. et al. GeOI pMOSFETs scaled down to 30-nm gate length with record off-state current. IEEE Electron. Device Lett. 31, 234–236 (2010).
Wu, H. & Ye, P. D. Fully depleted Ge CMOS devices and logic circuits on Si. IEEE Trans. Electron. Devices 63, 3028–3035 (2016).
Wu, H. et al. Germanium nMOSFETs with recessed channel and S/D: contact, scalability, interface, and drain current exceeding 1 A/mm. IEEE Trans. Electron. Devices 62, 1419–1426 (2015).
Mitard, J. et al. Record ION/IOFF performance for 65nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalability. In 2008 IEEE Int. Electron Devices Meet. 1–4 (IEEE, 2008).
Song, J., Woo, J., Prakash, A., Lee, D. & Hwang, H. Threshold selector with high selectivity and steep slope for cross-point memory array. IEEE Electron. Device Lett. 36, 681–683 (2015).
Woo, J. et al. Selector-less RRAM with non-linearity of device for cross-point array applications. Microelectron. Eng. 109, 360–363 (2013).
Song, B. et al. A HfO2/SiTe based dual-layer selector device with minor threshold voltage variation. Nanomaterials 9, 408 (2019).
Li, Y. et al. High-uniformity threshold switching HfO2-based selectors with patterned Ag nanodots. Adv. Sci. 7, 2002251 (2020).
Wang, R., Shi, T., Zhang, X., Wu, Z. & Liu, Q. A dual-functional Ta/TaOx/Ru device with both nonlinear selector and resistive switching behaviors. RSC Adv. 11, 18241–18245 (2021).
Bhattacharjee, S. et al. Insights into multilevel resistive switching in monolayer MoS2. ACS Appl. Mater. Interfaces 12, 6022–6029 (2020).
Wang, S. et al. All-atomristor logic gates. Nano Res. 16, 1688–1694 (2023).
Na, Y. S. et al. Irreversible conductive filament contacts for passivated van der Waals heterostructure devices. Adv. Funct. Mater. 32, 2207351 (2022).
Chen, X. et al. Oscillatory neural network-based ising machine using 2D memristors. ACS Nano 18, 10758–10767 (2024).
Xu, R. et al. Vertical MoS2 double-layer memristor with electrochemical metallization as an atomic-scale synapse with switching thresholds approaching 100 mV. Nano Lett. 19, 2411–2417 (2019).
Jeon, Y.-R., Akinwande, D. & Choi, C. Volatile threshold switching and synaptic properties controlled by Ag diffusion using Schottky defects. Nanoscale Horiz. 9, 853–862 (2024).
Maikap, S. & Rahaman, S. Z. Bipolar resistive switching memory characteristics using Al/Cu/GeOx/W memristor. ECS Trans. 45, 257 (2012).
Lee, H. Y. et al. Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM. In 2008 IEEE Int. Electron Devices Meet. (IEEE, 2008).
Yang, J. J. et al. High switching endurance in TaOx memristive devices. Appl. Phys. Lett. 97, 232102 (2010).
He, H.-K. et al. Ultrafast and stable phase transition realized in MoTe2-based memristive devices. Mater. Horiz. 9, 1036–1044 (2022).
Won, U. Y. et al. Multi-neuron connection using multi-terminal floating–gate memristor for unsupervised learning. Nat. Commun. 14, 3070 (2023).
Su, Z., Cheng, H., Sun, X., Sun, H. & Zuo, C. High-performance floating gate heterostructure with WSe2-MoS2 diode channel for neural synapse. IEEE Electron. Device Lett. 44, 1084–1087 (2023).
Yu, J. et al. Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts. Nat. Commun. 14, 5662 (2023).
Zhao, X. et al. Confining cation injection to enhance CBRAM performance by nanopore graphene layer. Small 13, 1603948 (2017).
Yang, S. J. et al. Giant memory window performance and low power consumption of hexagonal boron nitride monolayer atomristor. npj 2D Mater. Appl. 9, 9 (2025).
Tuma, T., Pantazi, A., Le Gallo, M., Sebastian, A. & Eleftheriou, E. Stochastic phase-change neurons. Nat. Nanotechnol. 11, 693–699 (2016).
Oh, S. et al. HfZrOx-based ferroelectric synapse device with 32 levels of conductance states for neuromorphic applications. IEEE Electron. Device Lett. 38, 732–735 (2017).
Lu, T. et al. Two-dimensional fully ferroelectric-gated hybrid computing-in-memory hardware for high-precision and energy-efficient dynamic tracking. Sci. Adv. 10, eadp0174 (2024).
Merrikh-Bayat, F. et al. High-performance mixed-signal neurocomputing with nanoscale floating-gate memory cell arrays. IEEE Trans. Neural Netw. Learn. Syst. 29, 4782–4790 (2018).
Yu, J. et al. High operation speed(10ns/100ns) and low read current (sub-1μA) 2D floating gate transistor. In 2024 IEEE Int. Mem. Workshop https://doi.org/10.1109/IMW59701.2024.10536953 (IEEE, 2024).
Chang, C.-F. et al. Revealing conducting filament evolution in low power and high reliability Fe3O4/Ta2O5 bilayer RRAM. Nano Energy 53, 871–879 (2018).
Kim, J. et al. Attojoule hexagonal boron nitride-based memristor for high-performance neuromorphic computing. Small 20, 2403737 (2024).
Xiao, Z. R. et al. Vertical n-type and p-type nanosheet FETs with C-shaped channel. IEEE Trans. Electron. Devices 70, 1380–1385 (2023).
Jiang, R. J. et al. Record 60.3 mV/dec subthreshold swing and >20% performance enhancement in gate-all-around nanosheet CMOS devices using O3-based quasi-atomic layer etching treatment technique. IEEE Electron. Device Lett. 46, 341–344 (2025).
Hafez, W. et al. An Intel 3 advanced FinFET platform technology for high performance computing and SOC product applications. In 2024 IEEE Symp. VLSI Technol. Circuits (IEEE, 2024).
Desai, S. B. et al. MoS2 transistors with 1-nanometer gate lengths. Science 354, 99–102 (2016).
Zhu, Y. et al. Monolayer molybdenum disulfide transistors with single-atom-thick gates. Nano Lett. 18, 3807–3813 (2018).
Tang, J. et al. Low power flexible monolayer MoS2 integrated circuits. Nat. Commun. 14, 3633 (2023).
Xu, Y. et al. Scalable integration of hybrid high-κ dielectric materials on two-dimensional semiconductors. Nat. Mater. 22, 1078–1084 (2023).
Acknowledgements
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea Government (RS-2025-16063688, RS-2025-00514456, RS-2025-02982993, RS-2024-00340377, RS-2025-02243032 and RS-2023-00256050) and by the Samsung Research Funding & Incubation Center of Samsung Electronics under project no. SRFC-MA1701-52.
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E.H. and H.H. contributed equally to all aspects of the article. Y.L., Y.J. and S.Y. researched data for the article. S.C. and H.Y. reviewed and edited the manuscript before submission. All authors contributed substantially to the discussion of the energy comparison.
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Hwang, E., Hong, H., Lee, Y. et al. Van der Waals materials for energy-efficient electronic devices. Nat Rev Mater (2026). https://doi.org/10.1038/s41578-025-00886-z
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DOI: https://doi.org/10.1038/s41578-025-00886-z


